mirrors-yuzu-emu/sirit
1
0
Fork 0
mirror of https://github.com/yuzu-emu/sirit synced 2024-11-22 17:43:54 +00:00
Code Issues Projects Releases Packages Wiki Activity

Add OpIAdd and OpBitwiseAnd

Browse source
This commit is contained in:
ReinUsesLisp 2018-11-03 00:52:44 -03:00
parent 15a4d3c0d4
commit d4c95981b5
3 changed files with 24 additions and 6 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

7
include/sirit/sirit.h
View file

@ -262,11 +262,18 @@ class Module {
/// The least-significant bits will be zero filled. /// The least-significant bits will be zero filled.
Id OpShiftLeftLogical(Id result_type, Id base, Id shift); Id OpShiftLeftLogical(Id result_type, Id base, Id shift);
/// Result is 1 if both Operand 1 and Operand 2 are 1. Result is 0 if either
/// Operand 1 or Operand 2 are 0.
Id OpBitwiseAnd(Id result_type, Id operand_1, Id operand_2);
// Arithmetic // Arithmetic
/// Unsigned-integer division of Operand 1 divided by Operand 2. /// Unsigned-integer division of Operand 1 divided by Operand 2.
Id OpUDiv(Id result_type, Id operand_1, Id operand_2); Id OpUDiv(Id result_type, Id operand_1, Id operand_2);
/// Integer addition of Operand 1 and Operand 2.
Id OpIAdd(Id result_type, Id operand_1, Id operand_2);
private: private:
Id AddCode(std::unique_ptr<Op> op); Id AddCode(std::unique_ptr<Op> op);

16
src/insts/arithmetic.cpp
View file

@ -11,11 +11,15 @@
namespace Sirit { namespace Sirit {
Id Module::OpUDiv(Id result_type, Id operand_1, Id operand_2) { #define DEFINE_BINARY(funcname, opcode) \
auto op{std::make_unique<Op>(spv::Op::OpUDiv, bound++, result_type)}; Id Module::funcname(Id result_type, Id operand_1, Id operand_2) { \
op->Add(operand_1); auto op{std::make_unique<Op>(opcode, bound++, result_type)}; \
op->Add(operand_2); op->Add(operand_1); \
return AddCode(std::move(op)); op->Add(operand_2); \
} return AddCode(std::move(op)); \
}
DEFINE_BINARY(OpUDiv, spv::Op::OpUDiv)
DEFINE_BINARY(OpIAdd, spv::Op::OpIAdd)
} // namespace Sirit } // namespace Sirit

7
src/insts/bit.cpp
View file

@ -35,4 +35,11 @@ Id Module::OpShiftLeftLogical(Id result_type, Id base, Id shift) {
return AddCode(std::move(op)); return AddCode(std::move(op));
} }
Id Module::OpBitwiseAnd(Id result_type, Id operand_1, Id operand_2) {
auto op{std::make_unique<Op>(spv::Op::OpBitwiseAnd, bound++, result_type)};
op->Add(operand_1);
op->Add(operand_2);
return AddCode(std::move(op));
}
} // namespace Sirit } // namespace Sirit