mirrors-yuzu-emu/unicorn
1
0
Fork 0
mirror of https://github.com/yuzu-emu/unicorn synced 2024-11-24 18:38:29 +00:00
Code Issues Projects Releases Packages Wiki Activity
unicorn/qemu/target/m68k/helper.h

85 lines
3.3 KiB
C
Raw Normal View History

rework code/block tracing
2016-01-23 02:28:17 +00:00
DEF_HELPER_4(uc_tracecode, void, i32, i32, ptr, i64)
import
2015-08-21 07:04:50 +00:00
DEF_HELPER_1(bitrev, i32, i32)
DEF_HELPER_1(ff1, i32, i32)
target-m68k: Reorg flags handling Separate all ccr bits. Continue to batch updates via cc_op. Signed-off-by: Richard Henderson <rth@twiddle.net> Fix gen_logic_cc() to really extend the size of the result. Fix gen_get_ccr(): update cc_op as it is used by the helper. Factorize flags computing and src/ccr cleanup Backports commit 620c6cf66584bfbee90db84a7e87a6eabf230ca9 from qemu
2018-02-27 14:27:47 +00:00
DEF_HELPER_FLAGS_2(sats, TCG_CALL_NO_RWG_SE, i32, i32, i32)
target-m68k: add 680x0 divu/divs variants Update helper to set the throwing location in case of div-by-0. Cleanup divX.w and add quad word variants of divX.l. Backports commit 0ccb9c1d8128a020720d5c6abf99a470742a1b94 from qemu
2018-03-01 16:37:55 +00:00
DEF_HELPER_3(divuw, void, env, int, i32)
DEF_HELPER_3(divsw, void, env, int, s32)
DEF_HELPER_4(divul, void, env, int, int, i32)
DEF_HELPER_4(divsl, void, env, int, int, s32)
DEF_HELPER_4(divull, void, env, int, int, i32)
DEF_HELPER_4(divsll, void, env, int, int, s32)
import
2015-08-21 07:04:50 +00:00
DEF_HELPER_2(set_sr, void, env, i32)
DEF_HELPER_3(movec, void, env, i32, i32)
target-m68k: add cas/cas2 ops Implement CAS using cmpxchg. Implement CAS2 using helper and either cmpxchg when the 32bit addresses are consecutive, or with parallel_cpus+cpu_loop_exit_atomic() otherwise. Backports commit 14f944063affbcc7bd6df42b060793dbfee8a822 from qemu
2018-03-01 16:55:03 +00:00
DEF_HELPER_4(cas2w, void, env, i32, i32, i32)
DEF_HELPER_4(cas2l, void, env, i32, i32, i32)
import
2015-08-21 07:04:50 +00:00
target-m68k: use floatx80 internally Coldfire uses float64, but 680x0 use floatx80. This patch introduces the use of floatx80 internally and enables 680x0 80bits FPU. Backports commit f83311e4764f1f25a8abdec2b32c64483be1759b from qemu
2018-03-03 23:57:34 +00:00
#define dh_alias_fp ptr
#define dh_ctype_fp FPReg *
#define dh_is_signed_fp dh_is_signed_ptr
DEF_HELPER_3(exts32, void, env, fp, s32)
DEF_HELPER_3(extf32, void, env, fp, f32)
DEF_HELPER_3(extf64, void, env, fp, f64)
DEF_HELPER_2(redf32, f32, env, fp)
DEF_HELPER_2(redf64, f64, env, fp)
DEF_HELPER_2(reds32, s32, env, fp)
DEF_HELPER_3(firound, void, env, fp, fp)
DEF_HELPER_3(fitrunc, void, env, fp, fp)
DEF_HELPER_3(fsqrt, void, env, fp, fp)
target/m68k: add explicit single and double precision operations Add fssqrt, fdsqrt, fsadd, fdadd, fssub, fdsub, fsmul, fdmul, fsdiv, fddiv. The precision is managed using set_floatx80_rounding_precision(). Backports commit a51b6bc38bb9b73a40e9486b52be12c810c6f2d9 from qemu
2018-03-04 01:55:38 +00:00
DEF_HELPER_3(fssqrt, void, env, fp, fp)
DEF_HELPER_3(fdsqrt, void, env, fp, fp)
target-m68k: use floatx80 internally Coldfire uses float64, but 680x0 use floatx80. This patch introduces the use of floatx80 internally and enables 680x0 80bits FPU. Backports commit f83311e4764f1f25a8abdec2b32c64483be1759b from qemu
2018-03-03 23:57:34 +00:00
DEF_HELPER_3(fabs, void, env, fp, fp)
DEF_HELPER_3(fchs, void, env, fp, fp)
DEF_HELPER_4(fadd, void, env, fp, fp, fp)
target/m68k: add explicit single and double precision operations Add fssqrt, fdsqrt, fsadd, fdadd, fssub, fdsub, fsmul, fdmul, fsdiv, fddiv. The precision is managed using set_floatx80_rounding_precision(). Backports commit a51b6bc38bb9b73a40e9486b52be12c810c6f2d9 from qemu
2018-03-04 01:55:38 +00:00
DEF_HELPER_4(fsadd, void, env, fp, fp, fp)
DEF_HELPER_4(fdadd, void, env, fp, fp, fp)
target-m68k: use floatx80 internally Coldfire uses float64, but 680x0 use floatx80. This patch introduces the use of floatx80 internally and enables 680x0 80bits FPU. Backports commit f83311e4764f1f25a8abdec2b32c64483be1759b from qemu
2018-03-03 23:57:34 +00:00
DEF_HELPER_4(fsub, void, env, fp, fp, fp)
target/m68k: add explicit single and double precision operations Add fssqrt, fdsqrt, fsadd, fdadd, fssub, fdsub, fsmul, fdmul, fsdiv, fddiv. The precision is managed using set_floatx80_rounding_precision(). Backports commit a51b6bc38bb9b73a40e9486b52be12c810c6f2d9 from qemu
2018-03-04 01:55:38 +00:00
DEF_HELPER_4(fssub, void, env, fp, fp, fp)
DEF_HELPER_4(fdsub, void, env, fp, fp, fp)
target-m68k: use floatx80 internally Coldfire uses float64, but 680x0 use floatx80. This patch introduces the use of floatx80 internally and enables 680x0 80bits FPU. Backports commit f83311e4764f1f25a8abdec2b32c64483be1759b from qemu
2018-03-03 23:57:34 +00:00
DEF_HELPER_4(fmul, void, env, fp, fp, fp)
target/m68k: add explicit single and double precision operations Add fssqrt, fdsqrt, fsadd, fdadd, fssub, fdsub, fsmul, fdmul, fsdiv, fddiv. The precision is managed using set_floatx80_rounding_precision(). Backports commit a51b6bc38bb9b73a40e9486b52be12c810c6f2d9 from qemu
2018-03-04 01:55:38 +00:00
DEF_HELPER_4(fsmul, void, env, fp, fp, fp)
DEF_HELPER_4(fdmul, void, env, fp, fp, fp)
target-m68k: use floatx80 internally Coldfire uses float64, but 680x0 use floatx80. This patch introduces the use of floatx80 internally and enables 680x0 80bits FPU. Backports commit f83311e4764f1f25a8abdec2b32c64483be1759b from qemu
2018-03-03 23:57:34 +00:00
DEF_HELPER_4(fdiv, void, env, fp, fp, fp)
target/m68k: add explicit single and double precision operations Add fssqrt, fdsqrt, fsadd, fdadd, fssub, fdsub, fsmul, fdmul, fsdiv, fddiv. The precision is managed using set_floatx80_rounding_precision(). Backports commit a51b6bc38bb9b73a40e9486b52be12c810c6f2d9 from qemu
2018-03-04 01:55:38 +00:00
DEF_HELPER_4(fsdiv, void, env, fp, fp, fp)
DEF_HELPER_4(fddiv, void, env, fp, fp, fp)
target-m68k: add FPCR and FPSR Backports commit ba62494483ab51ee31c70952b6ce5171a31860b1 from qemu
2018-03-04 00:36:47 +00:00
DEF_HELPER_FLAGS_3(fcmp, TCG_CALL_NO_RWG, void, env, fp, fp)
DEF_HELPER_FLAGS_2(set_fpcr, TCG_CALL_NO_RWG, void, env, i32)
DEF_HELPER_FLAGS_2(ftst, TCG_CALL_NO_RWG, void, env, fp)
target/m68k: add fmovecr fmovecr moves a floating point constant from the FPU ROM to a floating point register. Backports commit 9d403660d91229922c2786e81c23cc9dd8e644f1 from qemu
2018-03-04 01:49:30 +00:00
DEF_HELPER_3(fconst, void, env, fp, i32)
import
2015-08-21 07:04:50 +00:00
DEF_HELPER_3(mac_move, void, env, i32, i32)
DEF_HELPER_3(macmulf, i64, env, i32, i32)
DEF_HELPER_3(macmuls, i64, env, i32, i32)
DEF_HELPER_3(macmulu, i64, env, i32, i32)
DEF_HELPER_2(macsats, void, env, i32)
DEF_HELPER_2(macsatu, void, env, i32)
DEF_HELPER_2(macsatf, void, env, i32)
DEF_HELPER_2(mac_set_flags, void, env, i32)
DEF_HELPER_2(set_macsr, void, env, i32)
DEF_HELPER_2(get_macf, i32, env, i64)
DEF_HELPER_1(get_macs, i32, i64)
DEF_HELPER_1(get_macu, i32, i64)
DEF_HELPER_2(get_mac_extf, i32, env, i32)
DEF_HELPER_2(get_mac_exti, i32, env, i32)
DEF_HELPER_3(set_mac_extf, void, env, i32, i32)
DEF_HELPER_3(set_mac_exts, void, env, i32, i32)
DEF_HELPER_3(set_mac_extu, void, env, i32, i32)
target-m68k: Reorg flags handling Separate all ccr bits. Continue to batch updates via cc_op. Signed-off-by: Richard Henderson <rth@twiddle.net> Fix gen_logic_cc() to really extend the size of the result. Fix gen_get_ccr(): update cc_op as it is used by the helper. Factorize flags computing and src/ccr cleanup Backports commit 620c6cf66584bfbee90db84a7e87a6eabf230ca9 from qemu
2018-02-27 14:27:47 +00:00
DEF_HELPER_2(flush_flags, void, env, i32)
DEF_HELPER_2(set_ccr, void, env, i32)
DEF_HELPER_FLAGS_1(get_ccr, TCG_CALL_NO_WG_SE, i32, env)
import
2015-08-21 07:04:50 +00:00
DEF_HELPER_2(raise_exception, void, env, i32)
target-m68k: Implement bitfield ops for memory Backports commit f2224f2c9a9ed63edaed77ae21ffb1e501d7f247 from qemu
2018-03-02 00:01:11 +00:00
target-m68k: Implement bfffo Backports commit a45f1763cc501861ea4f5eed06e6f58aa681a082 from qemu
2018-03-02 00:10:53 +00:00
DEF_HELPER_FLAGS_3(bfffo_reg, TCG_CALL_NO_RWG_SE, i32, i32, i32, i32)
target-m68k: Implement bitfield ops for memory Backports commit f2224f2c9a9ed63edaed77ae21ffb1e501d7f247 from qemu
2018-03-02 00:01:11 +00:00
DEF_HELPER_FLAGS_4(bfexts_mem, TCG_CALL_NO_WG, i32, env, i32, s32, i32)
DEF_HELPER_FLAGS_4(bfextu_mem, TCG_CALL_NO_WG, i64, env, i32, s32, i32)
DEF_HELPER_FLAGS_5(bfins_mem, TCG_CALL_NO_WG, i32, env, i32, i32, s32, i32)
DEF_HELPER_FLAGS_4(bfchg_mem, TCG_CALL_NO_WG, i32, env, i32, s32, i32)
DEF_HELPER_FLAGS_4(bfclr_mem, TCG_CALL_NO_WG, i32, env, i32, s32, i32)
DEF_HELPER_FLAGS_4(bfset_mem, TCG_CALL_NO_WG, i32, env, i32, s32, i32)
target-m68k: Implement bfffo Backports commit a45f1763cc501861ea4f5eed06e6f58aa681a082 from qemu
2018-03-02 00:10:53 +00:00
DEF_HELPER_FLAGS_4(bfffo_mem, TCG_CALL_NO_WG, i64, env, i32, s32, i32)
target-m68k: Implement bitfield ops for memory Backports commit f2224f2c9a9ed63edaed77ae21ffb1e501d7f247 from qemu
2018-03-02 00:01:11 +00:00
Reference in a new issue Copy permalink