2015-08-21 07:04:50 +00:00
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/*
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* Software MMU support
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, see <http://www.gnu.org/licenses/>.
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*
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*/
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/*
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* Generate inline load/store functions for all MMU modes (typically
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* at least _user and _kernel) as well as _data versions, for all data
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* sizes.
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*
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* Used by target op helpers.
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*
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* MMU mode suffixes are defined in target cpu.h.
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*/
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#ifndef CPU_LDST_H
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#define CPU_LDST_H
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#if defined(CONFIG_USER_ONLY)
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/* All direct uses of g2h and h2g need to go away for usermode softmmu. */
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#define g2h(x) ((void *)((unsigned long)(target_ulong)(x) + GUEST_BASE))
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#if HOST_LONG_BITS <= TARGET_VIRT_ADDR_SPACE_BITS
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#define h2g_valid(x) 1
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#else
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#define h2g_valid(x) ({ \
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unsigned long __guest = (unsigned long)(x) - GUEST_BASE; \
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(__guest < (1ul << TARGET_VIRT_ADDR_SPACE_BITS)) && \
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(!RESERVED_VA || (__guest < RESERVED_VA)); \
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})
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#endif
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#define h2g_nocheck(x) ({ \
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unsigned long __ret = (unsigned long)(x) - GUEST_BASE; \
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(abi_ulong)__ret; \
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})
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#define h2g(x) ({ \
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/* Check if given address fits target address space */ \
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assert(h2g_valid(x)); \
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h2g_nocheck(x); \
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})
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#define saddr(x) g2h(x)
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#define laddr(x) g2h(x)
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#else /* !CONFIG_USER_ONLY */
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/* NOTE: we use double casts if pointers and target_ulong have
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different sizes */
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#define saddr(x) (uint8_t *)(intptr_t)(x)
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#define laddr(x) (uint8_t *)(intptr_t)(x)
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#endif
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#define ldub_raw(p) ldub_p(laddr((p)))
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#define ldsb_raw(p) ldsb_p(laddr((p)))
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#define lduw_raw(p) lduw_p(laddr((p)))
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#define ldsw_raw(p) ldsw_p(laddr((p)))
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#define ldl_raw(p) ldl_p(laddr((p)))
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#define ldq_raw(p) ldq_p(laddr((p)))
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#define ldfl_raw(p) ldfl_p(laddr((p)))
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#define ldfq_raw(p) ldfq_p(laddr((p)))
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#define stb_raw(p, v) stb_p(saddr((p)), v)
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#define stw_raw(p, v) stw_p(saddr((p)), v)
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#define stl_raw(p, v) stl_p(saddr((p)), v)
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#define stq_raw(p, v) stq_p(saddr((p)), v)
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#define stfl_raw(p, v) stfl_p(saddr((p)), v)
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#define stfq_raw(p, v) stfq_p(saddr((p)), v)
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#if defined(CONFIG_USER_ONLY)
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/* if user mode, no other memory access functions */
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#define ldub(p) ldub_raw(p)
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#define ldsb(p) ldsb_raw(p)
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#define lduw(p) lduw_raw(p)
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#define ldsw(p) ldsw_raw(p)
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#define ldl(p) ldl_raw(p)
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#define ldq(p) ldq_raw(p)
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#define ldfl(p) ldfl_raw(p)
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#define ldfq(p) ldfq_raw(p)
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#define stb(p, v) stb_raw(p, v)
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#define stw(p, v) stw_raw(p, v)
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#define stl(p, v) stl_raw(p, v)
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#define stq(p, v) stq_raw(p, v)
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#define stfl(p, v) stfl_raw(p, v)
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#define stfq(p, v) stfq_raw(p, v)
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#define cpu_ldub_code(env1, p) ldub_raw(p)
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#define cpu_ldsb_code(env1, p) ldsb_raw(p)
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#define cpu_lduw_code(env1, p) lduw_raw(p)
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#define cpu_ldsw_code(env1, p) ldsw_raw(p)
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#define cpu_ldl_code(env1, p) ldl_raw(p)
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#define cpu_ldq_code(env1, p) ldq_raw(p)
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#define cpu_ldub_data(env, addr) ldub_raw(addr)
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#define cpu_lduw_data(env, addr) lduw_raw(addr)
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#define cpu_ldsw_data(env, addr) ldsw_raw(addr)
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#define cpu_ldl_data(env, addr) ldl_raw(addr)
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#define cpu_ldq_data(env, addr) ldq_raw(addr)
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#define cpu_stb_data(env, addr, data) stb_raw(addr, data)
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#define cpu_stw_data(env, addr, data) stw_raw(addr, data)
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#define cpu_stl_data(env, addr, data) stl_raw(addr, data)
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#define cpu_stq_data(env, addr, data) stq_raw(addr, data)
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#define cpu_ldub_kernel(env, addr) ldub_raw(addr)
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#define cpu_lduw_kernel(env, addr) lduw_raw(addr)
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#define cpu_ldsw_kernel(env, addr) ldsw_raw(addr)
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#define cpu_ldl_kernel(env, addr) ldl_raw(addr)
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#define cpu_ldq_kernel(env, addr) ldq_raw(addr)
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#define cpu_stb_kernel(env, addr, data) stb_raw(addr, data)
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#define cpu_stw_kernel(env, addr, data) stw_raw(addr, data)
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#define cpu_stl_kernel(env, addr, data) stl_raw(addr, data)
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#define cpu_stq_kernel(env, addr, data) stq_raw(addr, data)
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#define ldub_kernel(p) ldub_raw(p)
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#define ldsb_kernel(p) ldsb_raw(p)
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#define lduw_kernel(p) lduw_raw(p)
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#define ldsw_kernel(p) ldsw_raw(p)
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#define ldl_kernel(p) ldl_raw(p)
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#define ldq_kernel(p) ldq_raw(p)
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#define ldfl_kernel(p) ldfl_raw(p)
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#define ldfq_kernel(p) ldfq_raw(p)
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#define stb_kernel(p, v) stb_raw(p, v)
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#define stw_kernel(p, v) stw_raw(p, v)
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#define stl_kernel(p, v) stl_raw(p, v)
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#define stq_kernel(p, v) stq_raw(p, v)
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#define stfl_kernel(p, v) stfl_raw(p, v)
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#define stfq_kernel(p, vt) stfq_raw(p, v)
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#define cpu_ldub_data(env, addr) ldub_raw(addr)
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#define cpu_lduw_data(env, addr) lduw_raw(addr)
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#define cpu_ldl_data(env, addr) ldl_raw(addr)
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#define cpu_stb_data(env, addr, data) stb_raw(addr, data)
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#define cpu_stw_data(env, addr, data) stw_raw(addr, data)
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#define cpu_stl_data(env, addr, data) stl_raw(addr, data)
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#else
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/* XXX: find something cleaner.
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* Furthermore, this is false for 64 bits targets
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*/
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#define ldul_user ldl_user
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#define ldul_kernel ldl_kernel
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#define ldul_hypv ldl_hypv
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#define ldul_executive ldl_executive
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#define ldul_supervisor ldl_supervisor
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/* The memory helpers for tcg-generated code need tcg_target_long etc. */
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#include "tcg.h"
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#define CPU_MMU_INDEX 0
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#define MEMSUFFIX MMU_MODE0_SUFFIX
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#define DATA_SIZE 1
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#include "exec/cpu_ldst_template.h"
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#define DATA_SIZE 2
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#include "exec/cpu_ldst_template.h"
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#define DATA_SIZE 4
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#include "exec/cpu_ldst_template.h"
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#define DATA_SIZE 8
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#include "exec/cpu_ldst_template.h"
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#undef CPU_MMU_INDEX
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#undef MEMSUFFIX
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#define CPU_MMU_INDEX 1
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#define MEMSUFFIX MMU_MODE1_SUFFIX
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#define DATA_SIZE 1
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#include "exec/cpu_ldst_template.h"
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#define DATA_SIZE 2
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#include "exec/cpu_ldst_template.h"
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#define DATA_SIZE 4
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#include "exec/cpu_ldst_template.h"
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#define DATA_SIZE 8
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#include "exec/cpu_ldst_template.h"
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#undef CPU_MMU_INDEX
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#undef MEMSUFFIX
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#if (NB_MMU_MODES >= 3)
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#define CPU_MMU_INDEX 2
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#define MEMSUFFIX MMU_MODE2_SUFFIX
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#define DATA_SIZE 1
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#include "exec/cpu_ldst_template.h"
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#define DATA_SIZE 2
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#include "exec/cpu_ldst_template.h"
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#define DATA_SIZE 4
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#include "exec/cpu_ldst_template.h"
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#define DATA_SIZE 8
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#include "exec/cpu_ldst_template.h"
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#undef CPU_MMU_INDEX
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#undef MEMSUFFIX
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#endif /* (NB_MMU_MODES >= 3) */
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#if (NB_MMU_MODES >= 4)
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#define CPU_MMU_INDEX 3
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#define MEMSUFFIX MMU_MODE3_SUFFIX
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#define DATA_SIZE 1
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#include "exec/cpu_ldst_template.h"
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#define DATA_SIZE 2
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#include "exec/cpu_ldst_template.h"
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#define DATA_SIZE 4
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#include "exec/cpu_ldst_template.h"
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#define DATA_SIZE 8
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#include "exec/cpu_ldst_template.h"
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#undef CPU_MMU_INDEX
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#undef MEMSUFFIX
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#endif /* (NB_MMU_MODES >= 4) */
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#if (NB_MMU_MODES >= 5)
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#define CPU_MMU_INDEX 4
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#define MEMSUFFIX MMU_MODE4_SUFFIX
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#define DATA_SIZE 1
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#include "exec/cpu_ldst_template.h"
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#define DATA_SIZE 2
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#include "exec/cpu_ldst_template.h"
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#define DATA_SIZE 4
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#include "exec/cpu_ldst_template.h"
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#define DATA_SIZE 8
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#include "exec/cpu_ldst_template.h"
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#undef CPU_MMU_INDEX
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#undef MEMSUFFIX
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#endif /* (NB_MMU_MODES >= 5) */
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#if (NB_MMU_MODES >= 6)
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#define CPU_MMU_INDEX 5
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#define MEMSUFFIX MMU_MODE5_SUFFIX
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#define DATA_SIZE 1
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#include "exec/cpu_ldst_template.h"
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#define DATA_SIZE 2
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#include "exec/cpu_ldst_template.h"
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#define DATA_SIZE 4
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#include "exec/cpu_ldst_template.h"
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#define DATA_SIZE 8
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#include "exec/cpu_ldst_template.h"
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#undef CPU_MMU_INDEX
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#undef MEMSUFFIX
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#endif /* (NB_MMU_MODES >= 6) */
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2018-02-12 16:20:21 +00:00
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#if (NB_MMU_MODES >= 7) && defined(MMU_MODE6_SUFFIX)
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#define CPU_MMU_INDEX 6
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#define MEMSUFFIX MMU_MODE6_SUFFIX
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#define DATA_SIZE 1
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#include "exec/cpu_ldst_template.h"
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#define DATA_SIZE 2
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#include "exec/cpu_ldst_template.h"
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#define DATA_SIZE 4
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#include "exec/cpu_ldst_template.h"
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#define DATA_SIZE 8
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#include "exec/cpu_ldst_template.h"
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#undef CPU_MMU_INDEX
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#undef MEMSUFFIX
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#endif /* (NB_MMU_MODES >= 7) */
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2018-02-13 13:34:47 +00:00
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#if (NB_MMU_MODES >= 8) && defined(MMU_MODE7_SUFFIX)
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#define CPU_MMU_INDEX 7
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#define MEMSUFFIX MMU_MODE7_SUFFIX
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#define DATA_SIZE 1
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#include "exec/cpu_ldst_template.h"
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#define DATA_SIZE 2
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#include "exec/cpu_ldst_template.h"
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#define DATA_SIZE 4
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#include "exec/cpu_ldst_template.h"
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#define DATA_SIZE 8
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#include "exec/cpu_ldst_template.h"
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#undef CPU_MMU_INDEX
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#undef MEMSUFFIX
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#endif /* (NB_MMU_MODES >= 8) */
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#if (NB_MMU_MODES >= 9) && defined(MMU_MODE8_SUFFIX)
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#define CPU_MMU_INDEX 8
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#define MEMSUFFIX MMU_MODE8_SUFFIX
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#define DATA_SIZE 1
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#include "exec/cpu_ldst_template.h"
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#define DATA_SIZE 2
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#include "exec/cpu_ldst_template.h"
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#define DATA_SIZE 4
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#include "exec/cpu_ldst_template.h"
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#define DATA_SIZE 8
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#include "exec/cpu_ldst_template.h"
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#undef CPU_MMU_INDEX
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#undef MEMSUFFIX
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#endif /* (NB_MMU_MODES >= 9) */
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#if (NB_MMU_MODES >= 10) && defined(MMU_MODE9_SUFFIX)
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#define CPU_MMU_INDEX 9
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#define MEMSUFFIX MMU_MODE9_SUFFIX
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#define DATA_SIZE 1
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#include "exec/cpu_ldst_template.h"
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#define DATA_SIZE 2
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#include "exec/cpu_ldst_template.h"
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#define DATA_SIZE 4
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#include "exec/cpu_ldst_template.h"
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#define DATA_SIZE 8
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#include "exec/cpu_ldst_template.h"
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#undef CPU_MMU_INDEX
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#undef MEMSUFFIX
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#endif /* (NB_MMU_MODES >= 10) */
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#if (NB_MMU_MODES >= 11) && defined(MMU_MODE10_SUFFIX)
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#define CPU_MMU_INDEX 10
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#define MEMSUFFIX MMU_MODE10_SUFFIX
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#define DATA_SIZE 1
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#include "exec/cpu_ldst_template.h"
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#define DATA_SIZE 2
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#include "exec/cpu_ldst_template.h"
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#define DATA_SIZE 4
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#include "exec/cpu_ldst_template.h"
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#define DATA_SIZE 8
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#include "exec/cpu_ldst_template.h"
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#undef CPU_MMU_INDEX
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#undef MEMSUFFIX
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|
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#endif /* (NB_MMU_MODES >= 11) */
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#if (NB_MMU_MODES >= 12) && defined(MMU_MODE11_SUFFIX)
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#define CPU_MMU_INDEX 11
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#define MEMSUFFIX MMU_MODE11_SUFFIX
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|
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#define DATA_SIZE 1
|
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|
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#include "exec/cpu_ldst_template.h"
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#define DATA_SIZE 2
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|
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#include "exec/cpu_ldst_template.h"
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#define DATA_SIZE 4
|
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|
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#include "exec/cpu_ldst_template.h"
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#define DATA_SIZE 8
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|
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#include "exec/cpu_ldst_template.h"
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#undef CPU_MMU_INDEX
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#undef MEMSUFFIX
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|
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#endif /* (NB_MMU_MODES >= 12) */
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#if (NB_MMU_MODES > 12)
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#error "NB_MMU_MODES > 12 is not supported for now"
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#endif /* (NB_MMU_MODES > 12) */
|
2015-08-21 07:04:50 +00:00
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/* these access are slower, they must be as rare as possible */
|
2018-02-15 16:53:57 +00:00
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|
#define CPU_MMU_INDEX (cpu_mmu_index(env, false))
|
2015-08-21 07:04:50 +00:00
|
|
|
#define MEMSUFFIX _data
|
|
|
|
#define DATA_SIZE 1
|
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|
|
#include "exec/cpu_ldst_template.h"
|
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|
|
|
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|
#define DATA_SIZE 2
|
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|
|
#include "exec/cpu_ldst_template.h"
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|
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|
#define DATA_SIZE 4
|
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|
|
#include "exec/cpu_ldst_template.h"
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|
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|
|
|
#define DATA_SIZE 8
|
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|
|
#include "exec/cpu_ldst_template.h"
|
|
|
|
#undef CPU_MMU_INDEX
|
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|
|
#undef MEMSUFFIX
|
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|
|
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|
|
#define ldub(p) ldub_data(p)
|
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|
|
#define ldsb(p) ldsb_data(p)
|
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|
|
#define lduw(p) lduw_data(p)
|
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|
|
#define ldsw(p) ldsw_data(p)
|
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|
|
#define ldl(p) ldl_data(p)
|
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|
|
#define ldq(p) ldq_data(p)
|
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|
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|
|
#define stb(p, v) stb_data(p, v)
|
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|
|
#define stw(p, v) stw_data(p, v)
|
|
|
|
#define stl(p, v) stl_data(p, v)
|
|
|
|
#define stq(p, v) stq_data(p, v)
|
|
|
|
|
2018-02-15 16:53:57 +00:00
|
|
|
#define CPU_MMU_INDEX (cpu_mmu_index(env, true))
|
2015-08-21 07:04:50 +00:00
|
|
|
#define MEMSUFFIX _code
|
|
|
|
#define SOFTMMU_CODE_ACCESS
|
|
|
|
|
|
|
|
#define DATA_SIZE 1
|
|
|
|
#include "exec/cpu_ldst_template.h"
|
|
|
|
|
|
|
|
#define DATA_SIZE 2
|
|
|
|
#include "exec/cpu_ldst_template.h"
|
|
|
|
|
|
|
|
#define DATA_SIZE 4
|
|
|
|
#include "exec/cpu_ldst_template.h"
|
|
|
|
|
|
|
|
#define DATA_SIZE 8
|
|
|
|
#include "exec/cpu_ldst_template.h"
|
|
|
|
|
|
|
|
#undef CPU_MMU_INDEX
|
|
|
|
#undef MEMSUFFIX
|
|
|
|
#undef SOFTMMU_CODE_ACCESS
|
|
|
|
|
2018-02-13 20:00:43 +00:00
|
|
|
#endif /* defined(CONFIG_USER_ONLY) */
|
|
|
|
|
2015-08-21 07:04:50 +00:00
|
|
|
/**
|
|
|
|
* tlb_vaddr_to_host:
|
|
|
|
* @env: CPUArchState
|
|
|
|
* @addr: guest virtual address to look up
|
|
|
|
* @access_type: 0 for read, 1 for write, 2 for execute
|
|
|
|
* @mmu_idx: MMU index to use for lookup
|
|
|
|
*
|
|
|
|
* Look up the specified guest virtual index in the TCG softmmu TLB.
|
|
|
|
* If the TLB contains a host virtual address suitable for direct RAM
|
|
|
|
* access, then return it. Otherwise (TLB miss, TLB entry is for an
|
|
|
|
* I/O access, etc) return NULL.
|
|
|
|
*
|
|
|
|
* This is the equivalent of the initial fast-path code used by
|
|
|
|
* TCG backends for guest load and store accesses.
|
|
|
|
*/
|
|
|
|
static inline void *tlb_vaddr_to_host(CPUArchState *env, target_ulong addr,
|
|
|
|
int access_type, int mmu_idx)
|
|
|
|
{
|
2018-02-13 20:00:43 +00:00
|
|
|
#if defined(CONFIG_USER_ONLY)
|
|
|
|
return g2h(vaddr);
|
|
|
|
#else
|
2015-08-21 07:04:50 +00:00
|
|
|
int index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
|
|
|
|
CPUTLBEntry *tlbentry = &env->tlb_table[mmu_idx][index];
|
|
|
|
target_ulong tlb_addr;
|
|
|
|
uintptr_t haddr;
|
|
|
|
|
|
|
|
switch (access_type) {
|
|
|
|
case 0:
|
|
|
|
tlb_addr = tlbentry->addr_read;
|
|
|
|
break;
|
|
|
|
case 1:
|
|
|
|
tlb_addr = tlbentry->addr_write;
|
|
|
|
break;
|
|
|
|
case 2:
|
|
|
|
tlb_addr = tlbentry->addr_code;
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
g_assert_not_reached();
|
|
|
|
}
|
|
|
|
|
|
|
|
if ((addr & TARGET_PAGE_MASK)
|
|
|
|
!= (tlb_addr & (TARGET_PAGE_MASK | TLB_INVALID_MASK))) {
|
|
|
|
/* TLB entry is for a different page */
|
|
|
|
return NULL;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (tlb_addr & ~TARGET_PAGE_MASK) {
|
|
|
|
/* IO access */
|
|
|
|
return NULL;
|
|
|
|
}
|
|
|
|
|
2017-01-19 11:50:28 +00:00
|
|
|
haddr = (uintptr_t)(addr + env->tlb_table[mmu_idx][index].addend);
|
2015-08-21 07:04:50 +00:00
|
|
|
return (void *)haddr;
|
|
|
|
#endif /* defined(CONFIG_USER_ONLY) */
|
2018-02-13 20:00:43 +00:00
|
|
|
}
|
2015-08-21 07:04:50 +00:00
|
|
|
|
|
|
|
#endif /* CPU_LDST_H */
|