2016-04-05 23:21:36 +00:00
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-- Sample code to demonstrate how to emulate ARM code
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import Unicorn
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import Unicorn.Hook
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import qualified Unicorn.CPU.Arm as Arm
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2016-09-21 07:47:52 +00:00
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import Data.Bits
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2016-04-05 23:21:36 +00:00
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import qualified Data.ByteString as BS
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import Data.Word
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import qualified Numeric as N (showHex)
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-- Code to be emulated
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--
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-- mov r0, #0x37; sub r1, r2, r3
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armCode :: BS.ByteString
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armCode = BS.pack [0x37, 0x00, 0xa0, 0xe3, 0x03, 0x10, 0x42, 0xe0]
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-- sub sp, #0xc
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thumbCode :: BS.ByteString
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thumbCode = BS.pack [0x83, 0xb0]
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-- Memory address where emulation starts
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address :: Word64
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address = 0x10000
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-- Pretty-print integral as hex
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showHex :: (Integral a, Show a) => a -> String
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showHex =
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flip N.showHex ""
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-- Calculate code length
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codeLength :: Num a => BS.ByteString -> a
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codeLength =
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fromIntegral . BS.length
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hookBlock :: BlockHook ()
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hookBlock _ addr size _ =
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putStrLn $ ">>> Tracing basic block at 0x" ++ showHex addr ++
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", block size = 0x" ++ (maybe "0" showHex size)
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hookCode :: CodeHook ()
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hookCode _ addr size _ =
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putStrLn $ ">>> Tracing instruction at 0x" ++ showHex addr ++
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", instruction size = 0x" ++ (maybe "0" showHex size)
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testArm :: IO ()
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testArm = do
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putStrLn "Emulate ARM code"
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result <- runEmulator $ do
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-- Initialize emulator in ARM mode
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uc <- open ArchArm [ModeArm]
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-- Map 2MB memory for this emulation
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memMap uc address (2 * 1024 * 1024) [ProtAll]
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-- Write machine code to be emulated to memory
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memWrite uc address armCode
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-- Initialize machine registers
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regWrite uc Arm.R0 0x1234
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regWrite uc Arm.R2 0x6789
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regWrite uc Arm.R3 0x3333
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-- Tracing all basic blocks with customized callback
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blockHookAdd uc hookBlock () 1 0
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-- Tracing one instruction at address with customized callback
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codeHookAdd uc hookCode () address address
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-- Emulate machine code in infinite time (last param = Nothing), or
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-- when finishing all the code
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let codeLen = codeLength armCode
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start uc address (address + codeLen) Nothing Nothing
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-- Return the results
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r0 <- regRead uc Arm.R0
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r1 <- regRead uc Arm.R1
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return (r0, r1)
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case result of
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Right (r0, r1) -> do
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-- Now print out some registers
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putStrLn ">>> Emulation done. Below is the CPU context"
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putStrLn $ ">>> R0 = 0x" ++ showHex r0
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putStrLn $ ">>> R1 = 0x" ++ showHex r1
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Left err -> putStrLn $ "Failed with error: " ++ show err ++ " (" ++
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strerror err ++ ")"
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testThumb :: IO ()
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testThumb = do
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putStrLn "Emulate THUMB code"
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result <- runEmulator $ do
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-- Initialize emulator in ARM mode
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uc <- open ArchArm [ModeThumb]
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-- Map 2MB memory for this emulation
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memMap uc address (2 * 1024 * 1024) [ProtAll]
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-- Write machine code to be emulated to memory
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memWrite uc address thumbCode
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-- Initialize machine registers
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regWrite uc Arm.Sp 0x1234
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-- Tracing all basic blocks with customized callback
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blockHookAdd uc hookBlock () 1 0
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-- Tracing one instruction at address with customized callback
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codeHookAdd uc hookCode () address address
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-- Emulate machine code in infinite time (last param = Nothing), or
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-- when finishing all the code
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let codeLen = codeLength thumbCode
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2016-09-21 07:47:52 +00:00
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start uc (address .|. 1) (address + codeLen) Nothing Nothing
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2016-04-05 23:21:36 +00:00
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-- Return the results
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sp <- regRead uc Arm.Sp
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return sp
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case result of
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Right sp -> do
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-- Now print out some registers
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putStrLn ">>> Emulation done. Below is the CPU context"
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putStrLn $ ">>> SP = 0x" ++ showHex sp
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Left err -> putStrLn $ "Failed with error: " ++ show err ++ " (" ++
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strerror err ++ ")"
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main :: IO ()
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main = do
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testArm
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putStrLn "=========================="
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testThumb
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