Added assert

This commit is contained in:
emdel 2016-02-18 06:21:04 -08:00
parent 6e5a3a6d5b
commit 0383db9d27

View file

@ -23,7 +23,7 @@ import regress
mu = 0 mu = 0
zf = 1 # (0:clear, 1:set) zf = 0 # (0:clear, 1:set)
class Init(regress.RegressTest): class Init(regress.RegressTest):
@ -159,8 +159,8 @@ class Init(regress.RegressTest):
except UcError as e: except UcError as e:
print("ERROR: %s" % e) print("ERROR: %s" % e)
# now print out some registers rdx = mu.reg_read(UC_X86_REG_RDX)
print(">>> Emulation done. Below is the CPU context") self.assertEqual(rdx, 0xbabe, "RDX contains the wrong value. Eflags modification failed.")
if __name__ == '__main__': if __name__ == '__main__':