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target/i386: split cpu_set_mxcsr() and make cpu_set_fpuc() inline

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Split the cpu_set_mxcsr() and make cpu_set_fpuc() inline with specific
tcg code.

Backports commit 1d8ad165b688759bbf00e40431ee9fde8817d190 from qemu
This commit is contained in:
Yang Zhong 2018-03-03 21:46:45 -05:00 committed by Lioncash
parent 24225cb6fa
commit 0c739344d3
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GPG key ID: 4E3C3CC1031BA9C7
2 changed files with 20 additions and 12 deletions
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21
qemu/target/i386/cpu.h
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@ -1567,7 +1567,6 @@ void QEMU_NORETURN raise_interrupt(CPUX86State *nenv, int intno, int is_int,
/* cc_helper.c */
extern const uint8_t parity_table[256];
uint32_t cpu_cc_compute_all(CPUX86State *env1, int op);
void update_fp_status(CPUX86State *env);
static inline uint32_t cpu_compute_eflags(CPUX86State *env)
{
@ -1618,8 +1617,24 @@ static inline int32_t x86_get_a20_mask(CPUX86State *env)
}
/* fpu_helper.c */
void cpu_set_mxcsr(CPUX86State *env, uint32_t val);
void cpu_set_fpuc(CPUX86State *env, uint16_t val);
void update_fp_status(CPUX86State *env);
void update_mxcsr_status(CPUX86State *env);
static inline void cpu_set_mxcsr(CPUX86State *env, uint32_t mxcsr)
{
env->mxcsr = mxcsr;
if (tcg_enabled(env->uc)) {
update_mxcsr_status(env);
}
}
static inline void cpu_set_fpuc(CPUX86State *env, uint16_t fpuc)
{
env->fpuc = fpuc;
if (tcg_enabled(env->uc)) {
update_fp_status(env);
}
}
/* svm_helper.c */
void cpu_svm_check_intercept_param(CPUX86State *env1, uint32_t type,

11
qemu/target/i386/fpu_helper.c
View file

@ -1572,12 +1572,11 @@ void helper_xsetbv(CPUX86State *env, uint32_t ecx, uint64_t mask)
#define SSE_RC_CHOP 0x6000
#define SSE_FZ 0x8000
void cpu_set_mxcsr(CPUX86State *env, uint32_t mxcsr)
void update_mxcsr_status(CPUX86State *env)
{
uint32_t mxcsr = env->mxcsr;
int rnd_type;
env->mxcsr = mxcsr;
/* set rounding mode */
switch (mxcsr & SSE_RC_MASK) {
default:
@ -1603,12 +1602,6 @@ void cpu_set_mxcsr(CPUX86State *env, uint32_t mxcsr)
set_flush_to_zero((mxcsr & SSE_FZ) ? 1 : 0, &env->fp_status);
}
void cpu_set_fpuc(CPUX86State *env, uint16_t val)
{
env->fpuc = val;
update_fp_status(env);
}
void helper_ldmxcsr(CPUX86State *env, uint32_t val)
{
cpu_set_mxcsr(env, val);