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tcg/mips: implement goto_ptr
Backports commit 5786e0683c4f8170dd05a550814b8809d8ae6d86 from qemu
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1d6c4f1a42
commit
0e9d3d1943
2 changed files with 14 additions and 1 deletions
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@ -130,7 +130,7 @@ extern bool use_mips32r2_instructions;
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#define TCG_TARGET_HAS_muluh_i32 1
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#define TCG_TARGET_HAS_mulsh_i32 1
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#define TCG_TARGET_HAS_bswap32_i32 1
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#define TCG_TARGET_HAS_goto_ptr 0
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#define TCG_TARGET_HAS_goto_ptr 1
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#if TCG_TARGET_REG_BITS == 64
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#define TCG_TARGET_HAS_add2_i32 0
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@ -1761,6 +1761,11 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode opc,
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tcg_out_nop(s);
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s->tb_jmp_reset_offset[a0] = tcg_current_code_size(s);
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break;
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case INDEX_op_goto_ptr:
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/* jmp to the given host address (could be epilogue) */
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tcg_out_opc_reg(s, OPC_JR, 0, a0, 0);
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tcg_out_nop(s);
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break;
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case INDEX_op_br:
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tcg_out_brcond(s, TCG_COND_EQ, TCG_REG_ZERO, TCG_REG_ZERO,
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arg_label(s, a0));
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@ -2175,6 +2180,7 @@ static const TCGTargetOpDef mips_op_defs[] = {
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{ INDEX_op_exit_tb, { } },
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{ INDEX_op_goto_tb, { } },
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{ INDEX_op_br, { } },
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{ INDEX_op_goto_ptr, { "r" } },
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{ INDEX_op_ld8u_i32, { "r", "r" } },
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{ INDEX_op_ld8s_i32, { "r", "r" } },
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@ -2466,6 +2472,13 @@ static void tcg_target_qemu_prologue(TCGContext *s)
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/* delay slot */
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tcg_out_mov(s, TCG_TYPE_PTR, TCG_AREG0, tcg_target_call_iarg_regs[0]);
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/*
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* Return path for goto_ptr. Set return value to 0, a-la exit_tb,
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* and fall through to the rest of the epilogue.
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*/
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s->code_gen_epilogue = s->code_ptr;
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tcg_out_mov(s, TCG_TYPE_REG, TCG_REG_V0, TCG_REG_ZERO);
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/* TB epilogue */
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tb_ret_addr = s->code_ptr;
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for (i = 0; i < ARRAY_SIZE(tcg_target_callee_save_regs); i++) {
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