target/riscv: Rename trans_arith to gen_arith

Backports commit 8dc9e8a8b04c4308cf275aa6480d289dcd3cf9b3 from qemu
This commit is contained in:
Bastian Koppelmann 2019-03-19 05:35:41 -04:00 committed by Lioncash
parent 28daad082b
commit 1765e6a090
No known key found for this signature in database
GPG key ID: 4E3C3CC1031BA9C7
3 changed files with 18 additions and 18 deletions

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@ -317,12 +317,12 @@ static bool trans_srai(DisasContext *ctx, arg_srai *a)
static bool trans_add(DisasContext *ctx, arg_add *a)
{
return trans_arith(ctx, a, &tcg_gen_add_tl);
return gen_arith(ctx, a, &tcg_gen_add_tl);
}
static bool trans_sub(DisasContext *ctx, arg_sub *a)
{
return trans_arith(ctx, a, &tcg_gen_sub_tl);
return gen_arith(ctx, a, &tcg_gen_sub_tl);
}
static bool trans_sll(DisasContext *ctx, arg_sll *a)
@ -332,17 +332,17 @@ static bool trans_sll(DisasContext *ctx, arg_sll *a)
static bool trans_slt(DisasContext *ctx, arg_slt *a)
{
return trans_arith(ctx, a, &gen_slt);
return gen_arith(ctx, a, &gen_slt);
}
static bool trans_sltu(DisasContext *ctx, arg_sltu *a)
{
return trans_arith(ctx, a, &gen_sltu);
return gen_arith(ctx, a, &gen_sltu);
}
static bool trans_xor(DisasContext *ctx, arg_xor *a)
{
return trans_arith(ctx, a, &tcg_gen_xor_tl);
return gen_arith(ctx, a, &tcg_gen_xor_tl);
}
static bool trans_srl(DisasContext *ctx, arg_srl *a)
@ -357,12 +357,12 @@ static bool trans_sra(DisasContext *ctx, arg_sra *a)
static bool trans_or(DisasContext *ctx, arg_or *a)
{
return trans_arith(ctx, a, &tcg_gen_or_tl);
return gen_arith(ctx, a, &tcg_gen_or_tl);
}
static bool trans_and(DisasContext *ctx, arg_and *a)
{
return trans_arith(ctx, a, &tcg_gen_and_tl);
return gen_arith(ctx, a, &tcg_gen_and_tl);
}
#ifdef TARGET_RISCV64
@ -412,12 +412,12 @@ static bool trans_sraiw(DisasContext *ctx, arg_sraiw *a)
static bool trans_addw(DisasContext *ctx, arg_addw *a)
{
return trans_arith(ctx, a, &gen_addw);
return gen_arith(ctx, a, &gen_addw);
}
static bool trans_subw(DisasContext *ctx, arg_subw *a)
{
return trans_arith(ctx, a, &gen_subw);
return gen_arith(ctx, a, &gen_subw);
}
static bool trans_sllw(DisasContext *ctx, arg_sllw *a)

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@ -22,7 +22,7 @@
static bool trans_mul(DisasContext *ctx, arg_mul *a)
{
REQUIRE_EXT(ctx, RVM);
return trans_arith(ctx, a, &tcg_gen_mul_tl);
return gen_arith(ctx, a, &tcg_gen_mul_tl);
}
static bool trans_mulh(DisasContext *ctx, arg_mulh *a)
@ -46,7 +46,7 @@ static bool trans_mulh(DisasContext *ctx, arg_mulh *a)
static bool trans_mulhsu(DisasContext *ctx, arg_mulhsu *a)
{
REQUIRE_EXT(ctx, RVM);
return trans_arith(ctx, a, &gen_mulhsu);
return gen_arith(ctx, a, &gen_mulhsu);
}
static bool trans_mulhu(DisasContext *ctx, arg_mulhu *a)
@ -69,32 +69,32 @@ static bool trans_mulhu(DisasContext *ctx, arg_mulhu *a)
static bool trans_div(DisasContext *ctx, arg_div *a)
{
REQUIRE_EXT(ctx, RVM);
return trans_arith(ctx, a, &gen_div);
return gen_arith(ctx, a, &gen_div);
}
static bool trans_divu(DisasContext *ctx, arg_divu *a)
{
REQUIRE_EXT(ctx, RVM);
return trans_arith(ctx, a, &gen_divu);
return gen_arith(ctx, a, &gen_divu);
}
static bool trans_rem(DisasContext *ctx, arg_rem *a)
{
REQUIRE_EXT(ctx, RVM);
return trans_arith(ctx, a, &gen_rem);
return gen_arith(ctx, a, &gen_rem);
}
static bool trans_remu(DisasContext *ctx, arg_remu *a)
{
REQUIRE_EXT(ctx, RVM);
return trans_arith(ctx, a, &gen_remu);
return gen_arith(ctx, a, &gen_remu);
}
#ifdef TARGET_RISCV64
static bool trans_mulw(DisasContext *ctx, arg_mulw *a)
{
REQUIRE_EXT(ctx, RVM);
return trans_arith(ctx, a, &gen_mulw);
return gen_arith(ctx, a, &gen_mulw);
}
static bool trans_divw(DisasContext *ctx, arg_divw *a)

View file

@ -651,8 +651,8 @@ static bool gen_arith_div_w(DisasContext *ctx, arg_r *a,
}
#endif
static bool trans_arith(DisasContext *ctx, arg_r *a,
void(*func)(TCGContext *, TCGv, TCGv, TCGv))
static bool gen_arith(DisasContext *ctx, arg_r *a,
void(*func)(TCGContext *, TCGv, TCGv, TCGv))
{
TCGContext *tcg_ctx = ctx->uc->tcg_ctx;
TCGv source1, source2;