softfloat: define 680x0 specific values

Backports commit e5b0cbe8e8744b57faf0c62d023525cd466f5ab8 from qemu
This commit is contained in:
Laurent Vivier 2018-03-03 15:01:15 -05:00 committed by Lioncash
parent 68c9ab9b77
commit 199c62ea01
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@ -111,7 +111,7 @@ float16 float16_default_nan(float_status *status)
*----------------------------------------------------------------------------*/
float32 float32_default_nan(float_status *status)
{
#if defined(TARGET_SPARC)
#if defined(TARGET_SPARC) || defined(TARGET_M68K)
return const_float32(0x7FFFFFFF);
#elif defined(TARGET_PPC) || defined(TARGET_ARM) || defined(TARGET_ALPHA) || \
defined(TARGET_XTENSA)
@ -136,7 +136,7 @@ float32 float32_default_nan(float_status *status)
*----------------------------------------------------------------------------*/
float64 float64_default_nan(float_status *status)
{
#if defined(TARGET_SPARC)
#if defined(TARGET_SPARC) || defined(TARGET_M68K)
return const_float64(LIT64(0x7FFFFFFFFFFFFFFF));
#elif defined(TARGET_PPC) || defined(TARGET_ARM) || defined(TARGET_ALPHA)
return const_float64(LIT64(0x7FF8000000000000));
@ -162,6 +162,10 @@ floatx80 floatx80_default_nan(float_status *status)
{
floatx80 r;
#if defined(TARGET_M68K)
r.low = LIT64(0xFFFFFFFFFFFFFFFF);
r.high = 0x7FFF;
#else
if (status->snan_bit_is_one) {
r.low = LIT64(0xBFFFFFFFFFFFFFFF);
r.high = 0x7FFF;
@ -169,6 +173,7 @@ floatx80 floatx80_default_nan(float_status *status)
r.low = LIT64(0xC000000000000000);
r.high = 0xFFFF;
}
#endif
return r;
}
@ -502,6 +507,30 @@ static int pickNaN(flag aIsQNaN, flag aIsSNaN, flag bIsQNaN, flag bIsSNaN,
return 1;
}
}
#elif defined(TARGET_M68K)
static int pickNaN(flag aIsQNaN, flag aIsSNaN, flag bIsQNaN, flag bIsSNaN,
flag aIsLargerSignificand)
{
/* M68000 FAMILY PROGRAMMER'S REFERENCE MANUAL
* 3.4 FLOATING-POINT INSTRUCTION DETAILS
* If either operand, but not both operands, of an operation is a
* nonsignaling NaN, then that NaN is returned as the result. If both
* operands are nonsignaling NaNs, then the destination operand
* nonsignaling NaN is returned as the result.
* If either operand to an operation is a signaling NaN (SNaN), then the
* SNaN bit is set in the FPSR EXC byte. If the SNaN exception enable bit
* is set in the FPCR ENABLE byte, then the exception is taken and the
* destination is not modified. If the SNaN exception enable bit is not
* set, setting the SNaN bit in the operand to a one converts the SNaN to
* a nonsignaling NaN. The operation then continues as described in the
* preceding paragraph for nonsignaling NaNs.
*/
if (aIsQNaN || aIsSNaN) { /* a is the destination operand */
return 0; /* return the destination operand */
} else {
return 1; /* return b */
}
}
#else
static int pickNaN(flag aIsQNaN, flag aIsSNaN, flag bIsQNaN, flag bIsSNaN,
flag aIsLargerSignificand)