From 1aedb26670fc0d7120d5d21d20a3d23d75736f84 Mon Sep 17 00:00:00 2001 From: Julian Brown Date: Fri, 2 Mar 2018 00:18:09 -0500 Subject: [PATCH] target/arm: Add cfgend parameter for ARM CPU selection. Add a new "cfgend" property which selects whether the CPU resets into big-endian mode or not. This setting affects whether we reset with SCTLR_B (ARMv6 and earlier) or SCTLR_EE (ARMv7 and later) set. Backports commit 3a062d5730266b2386eeda68b1a1c6e96451db31 from qemu --- qemu/target/arm/cpu.c | 8 ++++++++ qemu/target/arm/cpu.h | 7 +++++++ 2 files changed, 15 insertions(+) diff --git a/qemu/target/arm/cpu.c b/qemu/target/arm/cpu.c index e9545c13..3a0dcb84 100644 --- a/qemu/target/arm/cpu.c +++ b/qemu/target/arm/cpu.c @@ -527,6 +527,14 @@ static int arm_cpu_realizefn(struct uc_struct *uc, DeviceState *dev, Error **err cpu->reset_sctlr |= (1 << 13); } + if (cpu->cfgend) { + if (arm_feature(&cpu->env, ARM_FEATURE_V7)) { + cpu->reset_sctlr |= SCTLR_EE; + } else { + cpu->reset_sctlr |= SCTLR_B; + } + } + if (!cpu->has_el3) { /* If the has_el3 CPU property is disabled then we need to disable the * feature. diff --git a/qemu/target/arm/cpu.h b/qemu/target/arm/cpu.h index 2f595b19..d3e252d3 100644 --- a/qemu/target/arm/cpu.h +++ b/qemu/target/arm/cpu.h @@ -672,6 +672,13 @@ typedef struct ARMCPU { uint32_t dcz_blocksize; uint64_t rvbar; + /* Whether the cfgend input is high (i.e. this CPU should reset into + * big-endian mode). This setting isn't used directly: instead it modifies + * the reset_sctlr value to have SCTLR_B or SCTLR_EE set, depending on the + * architecture version. + */ + bool cfgend; + ARMELChangeHook *el_change_hook; void *el_change_hook_opaque; } ARMCPU;