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target-arm: Break out mpidr_read_val()

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Break out mpidr_read_val() to allow future sharing of the
code that conditionally sets the M and U bits of MPIDR.

No functional changes.

Backports commit 06a7e6477c129ceaa72bd400cf281d44c456be43 from qemu
This commit is contained in:
Edgar E. Iglesias 2018-02-15 12:44:40 -05:00 committed by Lioncash
parent 766dccbad9
commit 2b4c03224b
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GPG key ID: 4E3C3CC1031BA9C7
1 changed files with 6 additions and 1 deletions
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7
qemu/target-arm/helper.c
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@ -2148,7 +2148,7 @@ static uint64_t midr_read(CPUARMState *env, const ARMCPRegInfo *ri)
return raw_read(env, ri); return raw_read(env, ri);
} }
static uint64_t mpidr_read(CPUARMState *env, const ARMCPRegInfo *ri) static uint64_t mpidr_read_val(CPUARMState *env)
{ {
ARMCPU *cpu = ARM_CPU(env->uc, arm_env_get_cpu(env)); ARMCPU *cpu = ARM_CPU(env->uc, arm_env_get_cpu(env));
uint64_t mpidr = cpu->mp_affinity; uint64_t mpidr = cpu->mp_affinity;
@ -2166,6 +2166,11 @@ static uint64_t mpidr_read(CPUARMState *env, const ARMCPRegInfo *ri)
return mpidr; return mpidr;
} }
static uint64_t mpidr_read(CPUARMState *env, const ARMCPRegInfo *ri)
{
return mpidr_read_val(env);
}
static const ARMCPRegInfo mpidr_cp_reginfo[] = { static const ARMCPRegInfo mpidr_cp_reginfo[] = {
{ "MPIDR", 0,0,0, 3,0,5, ARM_CP_STATE_BOTH, { "MPIDR", 0,0,0, 3,0,5, ARM_CP_STATE_BOTH,
ARM_CP_NO_RAW, PL1_R, 0, NULL, 0, 0, {0, 0}, ARM_CP_NO_RAW, PL1_R, 0, NULL, 0, 0, {0, 0},