diff --git a/qemu/target-m68k/translate.c b/qemu/target-m68k/translate.c
index 358708f7..7be115a0 100644
--- a/qemu/target-m68k/translate.c
+++ b/qemu/target-m68k/translate.c
@@ -276,8 +276,7 @@ static TCGv gen_addr_index(DisasContext *s, uint16_t ext, TCGv tmp)
 
 /* Handle a base + index + displacement effective addresss.
    A NULL_QREG base means pc-relative.  */
-static TCGv gen_lea_indexed(CPUM68KState *env, DisasContext *s, int opsize,
-                            TCGv base)
+static TCGv gen_lea_indexed(CPUM68KState *env, DisasContext *s, TCGv base)
 {
     TCGContext *tcg_ctx = s->uc->tcg_ctx;
     uint32_t offset;
@@ -519,7 +518,7 @@ static TCGv gen_lea(CPUM68KState *env, DisasContext *s, uint16_t insn,
         return tmp;
     case 6: /* Indirect index + displacement.  */
         reg = AREG(insn, 0);
-        return gen_lea_indexed(env, s, opsize, reg);
+        return gen_lea_indexed(env, s, reg);
     case 7: /* Other */
         switch (insn & 7) {
         case 0: /* Absolute short.  */
@@ -535,7 +534,7 @@ static TCGv gen_lea(CPUM68KState *env, DisasContext *s, uint16_t insn,
             s->pc += 2;
             return tcg_const_i32(tcg_ctx, offset);
         case 3: /* pc index+displacement.  */
-            return gen_lea_indexed(env, s, opsize, *(TCGv *)tcg_ctx->NULL_QREG);
+            return gen_lea_indexed(env, s, *(TCGv *)tcg_ctx->NULL_QREG);
         case 4: /* Immediate.  */
         default:
             return *(TCGv *)tcg_ctx->NULL_QREG;