From 404fa33c4b24bf656910c6a03bf2eea8940b8f56 Mon Sep 17 00:00:00 2001 From: Richard Henderson Date: Tue, 6 Mar 2018 10:20:17 -0500 Subject: [PATCH] target/arm: Use pointers in neon tbl helper Rather than passing a regno to the helper, pass pointers to the vector register directly. This eliminates the need to pass in the environment pointer and reduces the number of places that directly access env->vfp.regs[]. Backports commit e7c06c4e4c98c47899417f154df1f2ef4e8d09a0 from qemu --- qemu/target/arm/helper.h | 2 +- qemu/target/arm/op_helper.c | 17 +++++++---------- qemu/target/arm/translate.c | 8 ++++---- 3 files changed, 12 insertions(+), 15 deletions(-) diff --git a/qemu/target/arm/helper.h b/qemu/target/arm/helper.h index 70fff5d0..23f2a268 100644 --- a/qemu/target/arm/helper.h +++ b/qemu/target/arm/helper.h @@ -190,7 +190,7 @@ DEF_HELPER_FLAGS_2(rsqrte_f32, TCG_CALL_NO_RWG, f32, f32, ptr) DEF_HELPER_FLAGS_2(rsqrte_f64, TCG_CALL_NO_RWG, f64, f64, ptr) DEF_HELPER_2(recpe_u32, i32, i32, ptr) DEF_HELPER_FLAGS_2(rsqrte_u32, TCG_CALL_NO_RWG, i32, i32, ptr) -DEF_HELPER_5(neon_tbl, i32, env, i32, i32, i32, i32) +DEF_HELPER_FLAGS_4(neon_tbl, TCG_CALL_NO_RWG, i32, i32, i32, ptr, i32) DEF_HELPER_3(shl_cc, i32, env, i32, i32) DEF_HELPER_3(shr_cc, i32, env, i32, i32) diff --git a/qemu/target/arm/op_helper.c b/qemu/target/arm/op_helper.c index 968b822d..2fb3a192 100644 --- a/qemu/target/arm/op_helper.c +++ b/qemu/target/arm/op_helper.c @@ -53,20 +53,17 @@ static int exception_target_el(CPUARMState *env) return target_el; } -uint32_t HELPER(neon_tbl)(CPUARMState *env, uint32_t ireg, uint32_t def, - uint32_t rn, uint32_t maxindex) +uint32_t HELPER(neon_tbl)(uint32_t ireg, uint32_t def, void *vn, + uint32_t maxindex) { - uint32_t val; - uint32_t tmp; - int index; - int shift; - uint64_t *table; - table = (uint64_t *)&env->vfp.regs[rn]; + uint32_t val, shift; + uint64_t *table = vn; + val = 0; for (shift = 0; shift < 32; shift += 8) { - index = (ireg >> shift) & 0xff; + uint32_t index = (ireg >> shift) & 0xff; if (index < maxindex) { - tmp = (table[index >> 3] >> ((index & 7) << 3)) & 0xff; + uint32_t tmp = (table[index >> 3] >> ((index & 7) << 3)) & 0xff; val |= tmp << shift; } else { val |= def & (0xff << shift); diff --git a/qemu/target/arm/translate.c b/qemu/target/arm/translate.c index c2924708..e9072351 100644 --- a/qemu/target/arm/translate.c +++ b/qemu/target/arm/translate.c @@ -7701,9 +7701,9 @@ static int disas_neon_data_insn(DisasContext *s, uint32_t insn) tcg_gen_movi_i32(tcg_ctx, tmp, 0); } tmp2 = neon_load_reg(tcg_ctx, rm, 0); - tmp4 = tcg_const_i32(tcg_ctx, rn); + ptr1 = vfp_reg_ptr(tcg_ctx, true, rn); tmp5 = tcg_const_i32(tcg_ctx, n); - gen_helper_neon_tbl(tcg_ctx, tmp2, tcg_ctx->cpu_env, tmp2, tmp, tmp4, tmp5); + gen_helper_neon_tbl(tcg_ctx, tmp2, tmp2, tmp, ptr1, tmp5); tcg_temp_free_i32(tcg_ctx, tmp); if (insn & (1 << 6)) { tmp = neon_load_reg(tcg_ctx, rd, 1); @@ -7712,9 +7712,9 @@ static int disas_neon_data_insn(DisasContext *s, uint32_t insn) tcg_gen_movi_i32(tcg_ctx, tmp, 0); } tmp3 = neon_load_reg(tcg_ctx, rm, 1); - gen_helper_neon_tbl(tcg_ctx, tmp3, tcg_ctx->cpu_env, tmp3, tmp, tmp4, tmp5); + gen_helper_neon_tbl(tcg_ctx, tmp3, tmp3, tmp, ptr1, tmp5); tcg_temp_free_i32(tcg_ctx, tmp5); - tcg_temp_free_i32(tcg_ctx, tmp4); + tcg_temp_free_ptr(tcg_ctx, ptr1); neon_store_reg(tcg_ctx, rd, 0, tmp2); neon_store_reg(tcg_ctx, rd, 1, tmp3); tcg_temp_free_i32(tcg_ctx, tmp);