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https://github.com/yuzu-emu/unicorn
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Backport the JAZELLE feature flag
Backports commit c99a55d38dd5b5131f3fcbbaf41828a09ee62544 in qemu to unicorn
This commit is contained in:
parent
84319130cd
commit
4fb2fbfacf
3 changed files with 5 additions and 1 deletions
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@ -364,6 +364,7 @@ static int arm_cpu_realizefn(struct uc_struct *uc, DeviceState *dev, Error **err
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}
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}
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if (arm_feature(env, ARM_FEATURE_V6)) {
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if (arm_feature(env, ARM_FEATURE_V6)) {
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set_feature(env, ARM_FEATURE_V5);
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set_feature(env, ARM_FEATURE_V5);
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set_feature(env, ARM_FEATURE_JAZELLE);
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if (!arm_feature(env, ARM_FEATURE_M)) {
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if (!arm_feature(env, ARM_FEATURE_M)) {
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set_feature(env, ARM_FEATURE_AUXCR);
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set_feature(env, ARM_FEATURE_AUXCR);
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}
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}
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@ -448,6 +449,7 @@ static void arm926_initfn(struct uc_struct *uc, Object *obj, void *opaque)
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set_feature(&cpu->env, ARM_FEATURE_VFP);
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set_feature(&cpu->env, ARM_FEATURE_VFP);
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set_feature(&cpu->env, ARM_FEATURE_DUMMY_C15_REGS);
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set_feature(&cpu->env, ARM_FEATURE_DUMMY_C15_REGS);
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set_feature(&cpu->env, ARM_FEATURE_CACHE_TEST_CLEAN);
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set_feature(&cpu->env, ARM_FEATURE_CACHE_TEST_CLEAN);
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set_feature(&cpu->env, ARM_FEATURE_JAZELLE);
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cpu->midr = 0x41069265;
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cpu->midr = 0x41069265;
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cpu->reset_fpsid = 0x41011090;
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cpu->reset_fpsid = 0x41011090;
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cpu->ctr = 0x1dd20d2;
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cpu->ctr = 0x1dd20d2;
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@ -477,6 +479,7 @@ static void arm1026_initfn(struct uc_struct *uc, Object *obj, void *opaque)
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set_feature(&cpu->env, ARM_FEATURE_AUXCR);
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set_feature(&cpu->env, ARM_FEATURE_AUXCR);
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set_feature(&cpu->env, ARM_FEATURE_DUMMY_C15_REGS);
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set_feature(&cpu->env, ARM_FEATURE_DUMMY_C15_REGS);
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set_feature(&cpu->env, ARM_FEATURE_CACHE_TEST_CLEAN);
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set_feature(&cpu->env, ARM_FEATURE_CACHE_TEST_CLEAN);
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set_feature(&cpu->env, ARM_FEATURE_JAZELLE);
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cpu->midr = 0x4106a262;
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cpu->midr = 0x4106a262;
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cpu->reset_fpsid = 0x410110a0;
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cpu->reset_fpsid = 0x410110a0;
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cpu->ctr = 0x1dd20d2;
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cpu->ctr = 0x1dd20d2;
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@ -755,6 +755,7 @@ enum arm_features {
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ARM_FEATURE_PMU, /* has PMU support */
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ARM_FEATURE_PMU, /* has PMU support */
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ARM_FEATURE_VBAR, /* has cp15 VBAR */
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ARM_FEATURE_VBAR, /* has cp15 VBAR */
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ARM_FEATURE_M_SECURITY, /* M profile Security Extension */
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ARM_FEATURE_M_SECURITY, /* M profile Security Extension */
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ARM_FEATURE_JAZELLE, /* has (trivial) Jazelle implementation */
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ARM_FEATURE_V8_SHA3, /* implements SHA3 part of v8 Crypto Extensions */
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ARM_FEATURE_V8_SHA3, /* implements SHA3 part of v8 Crypto Extensions */
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};
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};
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@ -41,7 +41,7 @@
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#define ENABLE_ARCH_5 arm_dc_feature(s, ARM_FEATURE_V5)
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#define ENABLE_ARCH_5 arm_dc_feature(s, ARM_FEATURE_V5)
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/* currently all emulated v5 cores are also v5TE, so don't bother */
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/* currently all emulated v5 cores are also v5TE, so don't bother */
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#define ENABLE_ARCH_5TE arm_dc_feature(s, ARM_FEATURE_V5)
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#define ENABLE_ARCH_5TE arm_dc_feature(s, ARM_FEATURE_V5)
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#define ENABLE_ARCH_5J 0
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#define ENABLE_ARCH_5J arm_dc_feature(s, ARM_FEATURE_JAZELLE)
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#define ENABLE_ARCH_6 arm_dc_feature(s, ARM_FEATURE_V6)
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#define ENABLE_ARCH_6 arm_dc_feature(s, ARM_FEATURE_V6)
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#define ENABLE_ARCH_6K arm_dc_feature(s, ARM_FEATURE_V6K)
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#define ENABLE_ARCH_6K arm_dc_feature(s, ARM_FEATURE_V6K)
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#define ENABLE_ARCH_6T2 arm_dc_feature(s, ARM_FEATURE_THUMB2)
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#define ENABLE_ARCH_6T2 arm_dc_feature(s, ARM_FEATURE_THUMB2)
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