From 7ca9a07e1b15621f5518de9393940b9078b5c871 Mon Sep 17 00:00:00 2001 From: Nguyen Anh Quynh Date: Sun, 23 Aug 2015 10:41:14 +0800 Subject: [PATCH] x86: enable SSE. this fixes issue #3 --- qemu/target-i386/unicorn.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/qemu/target-i386/unicorn.c b/qemu/target-i386/unicorn.c index ac0ebabd..7fdb5055 100644 --- a/qemu/target-i386/unicorn.c +++ b/qemu/target-i386/unicorn.c @@ -123,11 +123,11 @@ void x86_reg_reset(uch handle) default: break; case UC_MODE_32: - env->hflags |= HF_CS32_MASK | HF_SS32_MASK; + env->hflags |= HF_CS32_MASK | HF_SS32_MASK | HF_OSFXSR_MASK; env->cr[0] = CR0_PE_MASK; // protected mode break; case UC_MODE_64: - env->hflags |= HF_CS32_MASK | HF_SS32_MASK | HF_CS64_MASK | HF_LMA_MASK; + env->hflags |= HF_CS32_MASK | HF_SS32_MASK | HF_CS64_MASK | HF_LMA_MASK | HF_OSFXSR_MASK; env->hflags &= ~(HF_ADDSEG_MASK); env->cr[0] = CR0_PE_MASK; // protected mode break;