From a3ab677e63451818994c75dad7a0a60005da67c7 Mon Sep 17 00:00:00 2001 From: Peter Maydell Date: Mon, 12 Feb 2018 19:26:25 -0500 Subject: [PATCH] Switch non-CPU callers from ld/st*_phys to address_space_ld/st* Switch all the uses of ld/st*_phys to address_space_ld/st*, except for those cases where the address space is the CPU's (ie cs->as). This was done with the following script which generates a Coccinelle patch. A few over-80-columns lines in the result were rewrapped by hand where Coccinelle failed to do the wrapping automatically, as well as one location where it didn't put a line-continuation '\' when wrapping lines on a change made to a match inside a macro definition. ===begin=== for FN in ub uw_le uw_be l_le l_be q_le q_be uw l q; do cat <as,E2) @ other_matches_ld_${FN} depends on !cpu_matches_ld_${FN} @ expression E1,E2; @@ -ld${FN}_phys(E1,E2) +address_space_ld${FN}(E1,E2, MEMTXATTRS_UNSPECIFIED, NULL) EOF done for FN in b w_le w_be l_le l_be q_le q_be w l q; do cat <as,E2,E3) @ other_matches_st_${FN} depends on !cpu_matches_st_${FN} @ expression E1,E2,E3; @@ -st${FN}_phys(E1,E2,E3) +address_space_st${FN}(E1,E2,E3, MEMTXATTRS_UNSPECIFIED, NULL) EOF done ===endit=== Backports commit 42874d3a8c6267ff7789a0396843c884b1d0933a from qemu --- qemu/target-i386/arch_memory_mapping.c | 15 ++++++++------- 1 file changed, 8 insertions(+), 7 deletions(-) diff --git a/qemu/target-i386/arch_memory_mapping.c b/qemu/target-i386/arch_memory_mapping.c index e66ebc95..ac0b73f2 100644 --- a/qemu/target-i386/arch_memory_mapping.c +++ b/qemu/target-i386/arch_memory_mapping.c @@ -27,7 +27,7 @@ static void walk_pte(MemoryMappingList *list, AddressSpace *as, for (i = 0; i < 512; i++) { pte_addr = (pte_start_addr + i * 8) & a20_mask; - pte = ldq_phys(as, pte_addr); + pte = address_space_ldq(as, pte_addr, MEMTXATTRS_UNSPECIFIED, NULL); if (!(pte & PG_PRESENT_MASK)) { /* not present */ continue; @@ -57,7 +57,7 @@ static void walk_pte2(MemoryMappingList *list, AddressSpace *as, for (i = 0; i < 1024; i++) { pte_addr = (pte_start_addr + i * 4) & a20_mask; - pte = ldl_phys(as, pte_addr); + pte = address_space_ldl(as, pte_addr, MEMTXATTRS_UNSPECIFIED, NULL); if (!(pte & PG_PRESENT_MASK)) { /* not present */ continue; @@ -89,7 +89,7 @@ static void walk_pde(MemoryMappingList *list, AddressSpace *as, for (i = 0; i < 512; i++) { pde_addr = (pde_start_addr + i * 8) & a20_mask; - pde = ldq_phys(as, pde_addr); + pde = address_space_ldq(as, pde_addr, MEMTXATTRS_UNSPECIFIED, NULL); if (!(pde & PG_PRESENT_MASK)) { /* not present */ continue; @@ -126,7 +126,7 @@ static void walk_pde2(MemoryMappingList *list, AddressSpace *as, for (i = 0; i < 1024; i++) { pde_addr = (pde_start_addr + i * 4) & a20_mask; - pde = ldl_phys(as, pde_addr); + pde = address_space_ldl(as, pde_addr, MEMTXATTRS_UNSPECIFIED, NULL); if (!(pde & PG_PRESENT_MASK)) { /* not present */ continue; @@ -167,7 +167,7 @@ static void walk_pdpe2(MemoryMappingList *list, AddressSpace *as, for (i = 0; i < 4; i++) { pdpe_addr = (pdpe_start_addr + i * 8) & a20_mask; - pdpe = ldq_phys(as, pdpe_addr); + pdpe = address_space_ldq(as, pdpe_addr, MEMTXATTRS_UNSPECIFIED, NULL); if (!(pdpe & PG_PRESENT_MASK)) { /* not present */ continue; @@ -192,7 +192,7 @@ static void walk_pdpe(MemoryMappingList *list, AddressSpace *as, for (i = 0; i < 512; i++) { pdpe_addr = (pdpe_start_addr + i * 8) & a20_mask; - pdpe = ldq_phys(as, pdpe_addr); + pdpe = address_space_ldq(as, pdpe_addr, MEMTXATTRS_UNSPECIFIED, NULL); if (!(pdpe & PG_PRESENT_MASK)) { /* not present */ continue; @@ -228,7 +228,8 @@ static void walk_pml4e(MemoryMappingList *list, AddressSpace *as, for (i = 0; i < 512; i++) { pml4e_addr = (pml4e_start_addr + i * 8) & a20_mask; - pml4e = ldq_phys(as, pml4e_addr); + pml4e = address_space_ldq(as, pml4e_addr, MEMTXATTRS_UNSPECIFIED, + NULL); if (!(pml4e & PG_PRESENT_MASK)) { /* not present */ continue;