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target-arm: Fix lpae bit in FSR on an alignment fault

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If an alignment fault occurred and target EL is using AArch32,
then DFSR/IFSR bit LPAE[9] must be set correctly.

Backports commit e0fe723c24562c8f909bb40f131bfdbe75650677 from qemu
This commit is contained in:
Sergey Sorokin 2018-02-25 23:10:23 -05:00 committed by Lioncash
parent af7b3995dd
commit a882118050
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GPG key ID: 4E3C3CC1031BA9C7
1 changed files with 1 additions and 1 deletions
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2
qemu/target-arm/op_helper.c
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@ -194,7 +194,7 @@ void arm_cpu_do_unaligned_access(CPUState *cs, vaddr vaddr,
* the LPAE long descriptor format, or the short descriptor format * the LPAE long descriptor format, or the short descriptor format
*/ */
if (arm_s1_regime_using_lpae_format(env, cpu_mmu_index(env, false))) { if (arm_s1_regime_using_lpae_format(env, cpu_mmu_index(env, false))) {
env->exception.fsr = 0x21; env->exception.fsr = (1 << 9) | 0x21;
} else { } else {
env->exception.fsr = 0x1; env->exception.fsr = 0x1;
} }