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tcg: fix 16-byte vector operations detection

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configure tries to detect if the compiler
supports 16-byte vector operations.

As stated in the comment of the detection
program, there is a problem with the system
compiler on GCC on Centos 7.

This program doesn't actually detect the problem
with GCC on RHEL7 on PPC64LE (Red Hat 4.8.5-28).

This patch updates the test to look more like
it is in QEMU helpers, and now detects the problem.

The error reported is:

CC ppc64-softmmu/accel/tcg/tcg-runtime-gvec.o
..//accel/tcg/tcg-runtime-gvec.c: In function ‘helper_gvec_shl8i’:
../accel/tcg/tcg-runtime-gvec.c:558:26: internal compiler error: in emit_move_insn, at expr.c:3495
*(vec8 *)(d + i) = *(vec8 *)(a + i) << shift;
^
Fixes: db43267 "tcg: Add generic vector expanders"

Backports commit 74912f6dad207bfdd5bfa8c6012c364ea9405fc7 from qemu
This commit is contained in:
Laurent Vivier 2018-04-07 23:02:58 -04:00 committed by Lioncash
parent c2e46f2931
commit b25de410a9
No known key found for this signature in database
GPG key ID: 4E3C3CC1031BA9C7
1 changed files with 8 additions and 0 deletions
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8
qemu/configure vendored
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@ -1166,6 +1166,14 @@ static S2 c2;
static S4 c4; static S4 c4;
static S8 c8; static S8 c8;
static int i; static int i;
void helper(void *d, void *a, int shift, int i);
void helper(void *d, void *a, int shift, int i)
{
*(U1 *)(d + i) = *(U1 *)(a + i) << shift;
*(U2 *)(d + i) = *(U2 *)(a + i) << shift;
*(U4 *)(d + i) = *(U4 *)(a + i) << shift;
*(U8 *)(d + i) = *(U8 *)(a + i) << shift;
}
int main(void) int main(void)
{ {
a1 += b1; a2 += b2; a4 += b4; a8 += b8; a1 += b1; a2 += b2; a4 += b4; a8 += b8;