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target/arm: Make disas_thumb2_insn() generate its own UNDEF exceptions
Refactor disas_thumb2_insn() so that it generates the code for raising an UNDEF exception for invalid insns, rather than returning a flag which the caller must check to see if it needs to generate the UNDEF code. This brings the function in to line with the behaviour of disas_thumb_insn() and disas_arm_insn(). Backports commit 2eea841c11096e8dcc457b80e21f3fbdc32d2590 from qemu
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1 changed files with 10 additions and 13 deletions
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@ -9957,9 +9957,8 @@ gen_thumb2_data_op(DisasContext *s, int op, int conds, uint32_t shifter_out,
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return 0;
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return 0;
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}
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}
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/* Translate a 32-bit thumb instruction. Returns nonzero if the instruction
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/* Translate a 32-bit thumb instruction. */
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is not legal. */
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static void disas_thumb2_insn(DisasContext *s, uint32_t insn)
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static int disas_thumb2_insn(DisasContext *s, uint32_t insn)
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{
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{
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TCGContext *tcg_ctx = s->uc->tcg_ctx;
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TCGContext *tcg_ctx = s->uc->tcg_ctx;
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uint32_t imm, shift, offset;
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uint32_t imm, shift, offset;
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@ -11199,16 +11198,16 @@ static int disas_thumb2_insn(DisasContext *s, uint32_t insn)
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/* UNPREDICTABLE, unallocated hint or
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/* UNPREDICTABLE, unallocated hint or
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* PLD/PLDW/PLI (literal)
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* PLD/PLDW/PLI (literal)
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*/
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*/
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return 0;
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return;
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}
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}
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if (op1 & 1) {
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if (op1 & 1) {
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return 0; /* PLD/PLDW/PLI or unallocated hint */
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return; /* PLD/PLDW/PLI or unallocated hint */
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}
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}
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if ((op2 == 0) || ((op2 & 0x3c) == 0x30)) {
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if ((op2 == 0) || ((op2 & 0x3c) == 0x30)) {
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return 0; /* PLD/PLDW/PLI or unallocated hint */
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return; /* PLD/PLDW/PLI or unallocated hint */
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}
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}
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/* UNDEF space, or an UNPREDICTABLE */
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/* UNDEF space, or an UNPREDICTABLE */
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return 1;
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goto illegal_op;
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}
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}
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}
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}
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memidx = get_mem_index(s);
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memidx = get_mem_index(s);
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@ -11334,9 +11333,10 @@ static int disas_thumb2_insn(DisasContext *s, uint32_t insn)
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default:
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default:
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goto illegal_op;
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goto illegal_op;
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}
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}
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return 0;
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return;
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illegal_op:
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illegal_op:
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return 1;
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gen_exception_insn(s, 4, EXCP_UDEF, syn_uncategorized(),
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default_exception_el(s));
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}
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}
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static void disas_thumb_insn(DisasContext *s, uint32_t insn)
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static void disas_thumb_insn(DisasContext *s, uint32_t insn)
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@ -12496,10 +12496,7 @@ static void thumb_tr_translate_insn(DisasContextBase *dcbase, CPUState *cpu)
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if (is_16bit) {
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if (is_16bit) {
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disas_thumb_insn(dc, insn);
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disas_thumb_insn(dc, insn);
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} else {
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} else {
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if (disas_thumb2_insn(dc, insn)) {
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disas_thumb2_insn(dc, insn);
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gen_exception_insn(dc, 4, EXCP_UDEF, syn_uncategorized(),
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default_exception_el(dc));
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}
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}
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}
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/* Advance the Thumb condexec condition. */
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/* Advance the Thumb condexec condition. */
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