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target/arm: Add Cortex-M33
Add a Cortex-M33 definition. The M33 is an M profile CPU which implements the ARM v8M architecture, including the M profile Security Extension. Backports commit c7b26382fee8b745c6e903c85281babf30c2cb7c from qemu
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1 changed files with 30 additions and 0 deletions
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@ -990,6 +990,35 @@ static void cortex_m4_initfn(struct uc_struct *uc, Object *obj, void *opaque)
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cpu->id_isar5 = 0x00000000;
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}
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static void cortex_m33_initfn(struct uc_struct *uc, Object *obj, void *opaque)
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{
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ARMCPU *cpu = ARM_CPU(uc, obj);
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set_feature(&cpu->env, ARM_FEATURE_V8);
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set_feature(&cpu->env, ARM_FEATURE_M);
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set_feature(&cpu->env, ARM_FEATURE_M_SECURITY);
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set_feature(&cpu->env, ARM_FEATURE_THUMB_DSP);
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cpu->midr = 0x410fd213; /* r0p3 */
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cpu->pmsav7_dregion = 16;
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cpu->sau_sregion = 8;
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cpu->id_pfr0 = 0x00000030;
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cpu->id_pfr1 = 0x00000210;
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cpu->id_dfr0 = 0x00200000;
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cpu->id_afr0 = 0x00000000;
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cpu->id_mmfr0 = 0x00101F40;
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cpu->id_mmfr1 = 0x00000000;
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cpu->id_mmfr2 = 0x01000000;
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cpu->id_mmfr3 = 0x00000000;
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cpu->id_isar0 = 0x01101110;
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cpu->id_isar1 = 0x02212000;
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cpu->id_isar2 = 0x20232232;
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cpu->id_isar3 = 0x01111131;
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cpu->id_isar4 = 0x01310132;
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cpu->id_isar5 = 0x00000000;
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cpu->clidr = 0x00000000;
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cpu->ctr = 0x8000c000;
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}
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static void arm_v7m_class_init(struct uc_struct *uc, ObjectClass *oc, void *data)
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{
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CPUClass *cc = CPU_CLASS(uc, oc);
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@ -1472,6 +1501,7 @@ static const ARMCPUInfo arm_cpus[] = {
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{ "arm11mpcore", arm11mpcore_initfn },
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{ "cortex-m3", cortex_m3_initfn, arm_v7m_class_init },
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{ "cortex-m4", cortex_m4_initfn, arm_v7m_class_init },
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{ "cortex-m33", cortex_m33_initfn, arm_v7m_class_init },
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{ "cortex-r5", cortex_r5_initfn },
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{ "cortex-a7", cortex_a7_initfn },
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{ "cortex-a8", cortex_a8_initfn },
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