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target/arm: Enable ARM_V8_FP16 feature bit for the AArch64 any CPU

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Now we have implemented FP16 we can enable it for the "any" CPU.

Backports commit 969b389ee8ba84bc3f2e7ccfa993679fac410ad2 from qemu
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Peter Maydell 2018-03-08 23:00:53 -05:00 committed by Lioncash
parent 6e41113897
commit eb4796e965
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GPG key ID: 4E3C3CC1031BA9C7
1 changed files with 3 additions and 2 deletions
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5
qemu/target/arm/cpu64.c
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@ -200,12 +200,13 @@ static void aarch64_any_initfn(struct uc_struct *uc, Object *obj, void *opaque)
set_feature(&cpu->env, ARM_FEATURE_V8_AES); set_feature(&cpu->env, ARM_FEATURE_V8_AES);
set_feature(&cpu->env, ARM_FEATURE_V8_SHA1); set_feature(&cpu->env, ARM_FEATURE_V8_SHA1);
set_feature(&cpu->env, ARM_FEATURE_V8_SHA256); set_feature(&cpu->env, ARM_FEATURE_V8_SHA256);
set_feature(&cpu->env, ARM_FEATURE_V8_PMULL);
set_feature(&cpu->env, ARM_FEATURE_CRC);
set_feature(&cpu->env, ARM_FEATURE_V8_SHA512); set_feature(&cpu->env, ARM_FEATURE_V8_SHA512);
set_feature(&cpu->env, ARM_FEATURE_V8_SHA3); set_feature(&cpu->env, ARM_FEATURE_V8_SHA3);
set_feature(&cpu->env, ARM_FEATURE_V8_SM3); set_feature(&cpu->env, ARM_FEATURE_V8_SM3);
set_feature(&cpu->env, ARM_FEATURE_V8_SM4); set_feature(&cpu->env, ARM_FEATURE_V8_SM4);
set_feature(&cpu->env, ARM_FEATURE_V8_PMULL);
set_feature(&cpu->env, ARM_FEATURE_CRC);
set_feature(&cpu->env, ARM_FEATURE_V8_FP16);
cpu->ctr = 0x80038003; /* 32 byte I and D cacheline size, VIPT icache */ cpu->ctr = 0x80038003; /* 32 byte I and D cacheline size, VIPT icache */
cpu->dcz_blocksize = 7; /* 512 bytes */ cpu->dcz_blocksize = 7; /* 512 bytes */
} }