From f748c278b232d0b298550d2f5ba8aa600af5a2e4 Mon Sep 17 00:00:00 2001
From: Sergey Fedorov <serge.fdrv@gmail.com>
Date: Mon, 12 Feb 2018 20:47:23 -0500
Subject: [PATCH] target-arm: Adjust id_aa64pfr0 when has_el3 CPU property
 disabled

---
 qemu/target-arm/cpu.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/qemu/target-arm/cpu.c b/qemu/target-arm/cpu.c
index 256aa202..4e2f96fb 100644
--- a/qemu/target-arm/cpu.c
+++ b/qemu/target-arm/cpu.c
@@ -447,9 +447,10 @@ static int arm_cpu_realizefn(struct uc_struct *uc, DeviceState *dev, Error **err
         unset_feature(env, ARM_FEATURE_EL3);
 
         /* Disable the security extension feature bits in the processor feature
-         * register as well.  This is id_pfr1[7:4].
+         * registers as well. These are id_pfr1[7:4] and id_aa64pfr0[15:12].
          */
         cpu->id_pfr1 &= ~0xf0;
+        cpu->id_aa64pfr0 &= ~0xf000;
     }
 
     if (arm_feature(env, ARM_FEATURE_EL3)) {