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Author	SHA1	Message	Date
Igor Mammedov	97b525a794	mips: MIPSCPU model subclasses Register separate QOM types for each mips cpu model, so it would be possible to reuse generic CPU creation routines. Backports commit 41da212c9ce9482fcfd490170c2611470254f8dc from qemu	2018-03-05 00:42:29 -05:00
Thomas Huth	b2f1326437	Move target-* CPU file into a target/ folder We've currently got 18 architectures in QEMU, and thus 18 target-xxx folders in the root folder of the QEMU source tree. More architectures (e.g. RISC-V, AVR) are likely to be included soon, too, so the main folder of the QEMU sources slowly gets quite overcrowded with the target-xxx folders. To disburden the main folder a little bit, let's move the target-xxx folders into a dedicated target/ folder, so that target-xxx/ simply becomes target/xxx/ instead. Backports commit fcf5ef2ab52c621a4617ebbef36bf43b4003f4c0 from qemu	2018-03-01 22:50:58 -05:00

Author

SHA1

Message

Date

Igor Mammedov

97b525a794

mips: MIPSCPU model subclasses

Register separate QOM types for each mips cpu model,
so it would be possible to reuse generic CPU creation
routines.

Backports commit 41da212c9ce9482fcfd490170c2611470254f8dc from qemu

2018-03-05 00:42:29 -05:00

Thomas Huth

b2f1326437

Move target-* CPU file into a target/ folder

We've currently got 18 architectures in QEMU, and thus 18 target-xxx
folders in the root folder of the QEMU source tree. More architectures
(e.g. RISC-V, AVR) are likely to be included soon, too, so the main
folder of the QEMU sources slowly gets quite overcrowded with the
target-xxx folders.
To disburden the main folder a little bit, let's move the target-xxx
folders into a dedicated target/ folder, so that target-xxx/ simply
becomes target/xxx/ instead.

Backports commit fcf5ef2ab52c621a4617ebbef36bf43b4003f4c0 from qemu

2018-03-01 22:50:58 -05:00

Renamed from qemu/target-mips/cpu-qom.h (Browse further)

2 commits