* Update UC_HOOK_MEM_VALID
UC_HOOK_MEM_READ fires before handlers for invalid memory reads, so UC_HOOK_MEM_VALID would technically also be receiving invalid memory reads. Switching to UC_HOOK_MEM_READ_AFTER ensures that only actually valid reads are hooked
* Removed macro change, added comment
Removed the macro change, but added a clarifying comment. May submit a future PR with a new macro added
* Update unicorn.h
will -> may
* Update unicorn.h
Writing / reading to model specific registers should be as easy as
calling a function, it's a bit stupid to write shell code and run them
just to write/read to a MSR, and even worse, you need more than just a
shellcode to read...
So, add a special register ID called UC_X86_REG_MSR, which should be
passed to uc_reg_write()/uc_reg_read() as the register ID, and then a
data structure which is uc_x86_msr (12 bytes), as the value (always), where:
Byte Value Size
0 MSR ID 4
4 MSR val 8
* unicorn: use waitable timer to implement usleep() on Windows
Signed-off-by: vardyh <vardyh.dev@gmail.com>
* atomic: implement barrier() for msvc
Signed-off-by: vardyh <vardyh.dev@gmail.com>
* Fix for MIPS issue.
* Sparc support added.
* M68K support added.
* Arm support ported.
* Fix issue with VS2015 shlobj.h file
* Arm issue fix.
* Finalise MSVC port.
* reg_read and reg_write now work with registers W0 through W30 in Aarch64 emulaton
* Added a regress test for the ARM64 reg_read and reg_write on 32-bit registers (W0-W30)
Added a new macro in uc_priv.h (WRITE_DWORD_TO_QWORD), in order to write to the lower 32 bits of a 64 bit value without overwriting the whole value when using reg_write
* Fixed WRITE_DWORD macro
reg_write would zero out the high order bits when writing to 32 bit registers
e.g. uc.reg_write(UC_X86_REG_EAX, 0) would also set register RAX to zero
