259 commits

Author	SHA1	Message	Date
mothran	eeebcc5a44	added bad_ram regress	2015-09-28 21:41:38 -07:00
Nguyen Anh Quynh	8b4d274c34	regress: convert some mips tests to use unittest	2015-09-28 11:57:24 +08:00
Nguyen Anh Quynh	2b0b4169bc	mips: advance PC for SYSCALL instruction. this fixes issue #157	2015-09-28 10:58:43 +08:00
Ryan Hileman	13be3435c9	add regress for #157	2015-09-27 01:08:46 -07:00
Nguyen Anh Quynh	53ce8f217d	mips: handle delay slot better for branch instructions. this should fix issue #155	2015-09-27 15:05:40 +08:00
Ryan Hileman	4b42b4be52	add regress for #155	2015-09-26 12:48:25 -07:00
Nguyen Anh Quynh	90eb8f2e72	This commit continues the PR #111 ... - Allow to register handler separately for invalid memory access - Add new memory events for hooking: - UC_MEM_READ_INVALID, UC_MEM_WRITE_INVALID, UC_MEM_FETCH_INVALID - UC_HOOK_MEM_READ_PROT, UC_HOOK_MEM_WRITE_PROT, UC_HOOK_MEM_FETCH_PROT - Rename UC_ERR_EXEC_PROT to UC_ERR_FETCH_PROT - Change API uc_hook_add() so event type @type can be combined from hooking types	2015-09-24 14:18:02 +08:00
Nguyen Anh Quynh	14a01b5186	mips: handle delay slot so do not duplicate calling instruction handler. this fixes issue #133	2015-09-22 11:59:53 +08:00
danghvu	3c1d65ea66	Reorganize test directories	2015-09-21 20:47:45 -05:00