Benjamin Herrenschmidt 1722be3e73 tlb: Add ifetch argument to cpu_mmu_index() ... This is set to true when the index is for an instruction fetch translation. The core get_page_addr_code() sets it, as do the SOFTMMU_CODE_ACCESS acessors. All targets ignore it for now, and all other callers pass "false". This will allow targets who wish to split the mmu index between instruction and data accesses to do so. A subsequent patch will do just that for PowerPC. Backports commit 97ed5ccdee95f0b98bedc601ff979e368583472c from qemu		2018-02-17 15:23:37 -05:00
..
arch_memory_mapping.c
bpt_helper.c
cc_helper.c
cc_helper_template.h
cpu-qom.h	target-i386: create a separate AddressSpace for each CPU	2018-02-13 12:36:26 -05:00
cpu.c	target-i386: emulate CPUID level of real hardware	2018-02-17 15:23:21 -05:00
cpu.h	tlb: Add ifetch argument to cpu_mmu_index()	2018-02-17 15:23:37 -05:00
excp_helper.c
fpu_helper.c	target-i386/FPU: a misprint in helper_fistll_ST0	2018-02-17 15:23:22 -05:00
helper.c	target-i386: Use correct memory attributes for memory accesses	2018-02-13 11:54:12 -05:00
helper.h	target-i386: Use correct memory attributes for ioport accesses	2018-02-13 12:27:43 -05:00
int_helper.c
Makefile.objs
mem_helper.c
misc_helper.c	target-i386: Use correct memory attributes for ioport accesses	2018-02-13 12:27:43 -05:00
ops_sse.h	target-i386: simplify AES emulation	2018-02-17 15:23:19 -05:00
ops_sse_header.h
seg_helper.c	target-i386: Use correct memory attributes for memory accesses	2018-02-13 11:54:12 -05:00
shift_helper_template.h
smm_helper.c	target-i386: set G=1 in SMM big real mode selectors	2018-02-13 12:31:18 -05:00
svm.h
svm_helper.c	target-i386: Use correct memory attributes for memory accesses	2018-02-13 11:54:12 -05:00
TODO
topology.h
translate.c	tlb: Add ifetch argument to cpu_mmu_index()	2018-02-17 15:23:37 -05:00
unicorn.c
unicorn.h