unicorn/qemu/target-arm
Peter Maydell e07cd2542c
exec.c: Drop TARGET_HAS_ICE define and checks
The TARGET_HAS_ICE #define is intended to indicate whether a target-*
guest CPU implementation supports the breakpoint handling. However,
all our guest CPUs have that support (the only two which do not
define TARGET_HAS_ICE are unicore32 and openrisc, and in both those
cases the bp support is present and the lack of the #define is just
a bug). So remove the #define entirely: all new guest CPU support
should include breakpoint handling as part of the basic implementation.

Backports commit ec53b45bcd1f74f7a4c31331fa6d50b402cd6d26 from qemu
2018-02-18 18:17:14 -05:00
..
arm_ldst.h
cpu-qom.h target-arm: Refactor CPU affinity handling 2018-02-17 15:23:34 -05:00
cpu.c target-arm: Clean up includes 2018-02-17 21:09:32 -05:00
cpu.h exec.c: Drop TARGET_HAS_ICE define and checks 2018-02-18 18:17:14 -05:00
cpu64.c target-arm: Clean up includes 2018-02-17 21:09:32 -05:00
crypto_helper.c target-arm: Clean up includes 2018-02-17 21:09:32 -05:00
helper-a64.c target-arm: Clean up includes 2018-02-17 21:09:32 -05:00
helper-a64.h
helper.c target-arm: Clean up includes 2018-02-17 21:09:32 -05:00
helper.h target-arm: Fix CPU breakpoint handling 2018-02-17 15:24:02 -05:00
internals.h target-arm: Use the right MMU index in arm_regime_using_lpae_format 2018-02-17 20:56:32 -05:00
iwmmxt_helper.c target-arm: Clean up includes 2018-02-17 21:09:32 -05:00
kvm-consts.h
Makefile.objs
neon_helper.c target-arm: Clean up includes 2018-02-17 21:09:32 -05:00
op_addsub.h
op_helper.c target-arm: Clean up includes 2018-02-17 21:09:32 -05:00
psci.c
translate-a64.c target-arm: Clean up includes 2018-02-17 21:09:32 -05:00
translate.c target-arm: Clean up includes 2018-02-17 21:09:32 -05:00
translate.h tcg: Remove gen_intermediate_code_pc 2018-02-17 15:23:59 -05:00
unicorn.h
unicorn_aarch64.c
unicorn_arm.c