mirror of
https://github.com/yuzu-emu/unicorn
synced 2024-11-23 20:24:02 +00:00
c206e37963
* Implement timeout state and new error for such case * Adjust test_i386_loop sample * Adjust test_i386_loop test Backports commit 3a3bc0c22de5453335dfb597a95dbda07c9f47a2 from unicorn
306 lines
10 KiB
C
306 lines
10 KiB
C
/* Unicorn Emulator Engine */
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/* By Nguyen Anh Quynh <aquynh@gmail.com>, 2015 */
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#ifndef UC_PRIV_H
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#define UC_PRIV_H
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#include "unicorn/platform.h"
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#include <stdio.h>
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#include "qemu.h"
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#include "exec/ramlist.h"
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#include "unicorn/unicorn.h"
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#include "list.h"
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// These are masks of supported modes for each cpu/arch.
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// They should be updated when changes are made to the uc_mode enum typedef.
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#define UC_MODE_ARM_MASK (UC_MODE_ARM|UC_MODE_THUMB|UC_MODE_LITTLE_ENDIAN|UC_MODE_MCLASS | \
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UC_MODE_ARM926|UC_MODE_ARM946|UC_MODE_ARM1176|UC_MODE_BIG_ENDIAN)
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#define UC_MODE_M68K_MASK (UC_MODE_BIG_ENDIAN)
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#define UC_MODE_MIPS_MASK (UC_MODE_MIPS32|UC_MODE_MIPS64|UC_MODE_LITTLE_ENDIAN|UC_MODE_BIG_ENDIAN)
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#define UC_MODE_PPC_MASK (UC_MODE_PPC64|UC_MODE_BIG_ENDIAN)
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#define UC_MODE_RISCV_MASK (UC_MODE_RISCV32|UC_MODE_RISCV64)
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#define UC_MODE_SPARC_MASK (UC_MODE_SPARC32|UC_MODE_SPARC64|UC_MODE_BIG_ENDIAN)
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#define UC_MODE_X86_MASK (UC_MODE_16|UC_MODE_32|UC_MODE_64|UC_MODE_LITTLE_ENDIAN)
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#define ARR_SIZE(a) (sizeof(a)/sizeof(a[0]))
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#define READ_QWORD(x) ((uint64_t)x)
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#define READ_DWORD(x) (x & 0xffffffff)
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#define READ_WORD(x) (x & 0xffff)
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#define READ_BYTE_H(x) ((x & 0xffff) >> 8)
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#define READ_BYTE_L(x) (x & 0xff)
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#define WRITE_DWORD(x, w) (x = (x & ~0xffffffffLL) | (w & 0xffffffff))
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#define WRITE_WORD(x, w) (x = (x & ~0xffff) | (w & 0xffff))
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#define WRITE_BYTE_H(x, b) (x = (x & ~0xff00) | ((b & 0xff) << 8))
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#define WRITE_BYTE_L(x, b) (x = (x & ~0xff) | (b & 0xff))
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typedef struct ModuleEntry {
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void (*init)(void);
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QTAILQ_ENTRY(ModuleEntry) node;
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module_init_type type;
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} ModuleEntry;
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typedef QTAILQ_HEAD(, ModuleEntry) ModuleTypeList;
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typedef uc_err (*query_t)(struct uc_struct *uc, uc_query_type type, size_t *result);
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// return 0 on success, -1 on failure
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typedef int (*reg_read_t)(struct uc_struct *uc, unsigned int *regs, void **vals, int count);
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typedef int (*reg_write_t)(struct uc_struct *uc, unsigned int *regs, void *const *vals, int count);
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typedef void (*reg_reset_t)(struct uc_struct *uc);
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typedef bool (*uc_write_mem_t)(AddressSpace *as, hwaddr addr, const uint8_t *buf, int len);
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typedef bool (*uc_read_mem_t)(AddressSpace *as, hwaddr addr, uint8_t *buf, int len);
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typedef void (*uc_args_void_t)(void*);
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typedef void (*uc_args_uc_t)(struct uc_struct*);
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typedef int (*uc_args_int_uc_t)(struct uc_struct*);
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typedef void (*uc_cpu_exec_exit_t)(CPUState*);
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typedef bool (*uc_args_tcg_enable_t)(struct uc_struct*);
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typedef void (*uc_args_uc_long_t)(struct uc_struct*, unsigned long);
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typedef void (*uc_args_uc_u64_t)(struct uc_struct *, uint64_t addr);
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typedef MemoryRegion* (*uc_args_uc_ram_size_t)(struct uc_struct*, hwaddr begin, size_t size, uint32_t perms);
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typedef MemoryRegion* (*uc_args_uc_ram_size_ptr_t)(struct uc_struct*, hwaddr begin, size_t size, uint32_t perms, void *ptr);
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typedef void (*uc_mem_unmap_t)(struct uc_struct*, MemoryRegion *mr);
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typedef void (*uc_readonly_mem_t)(MemoryRegion *mr, bool readonly);
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// which interrupt should make emulation stop?
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typedef bool (*uc_args_int_t)(int intno);
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// some architecture redirect virtual memory to physical memory like Mips
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typedef uint64_t (*uc_mem_redirect_t)(uint64_t address);
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// validate if Unicorn supports hooking a given instruction
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typedef bool(*uc_insn_hook_validate)(uint32_t insn_enum);
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struct hook {
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int type; // UC_HOOK_*
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int insn; // instruction for HOOK_INSN
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int refs; // reference count to free hook stored in multiple lists
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uint64_t begin, end; // only trigger if PC or memory access is in this address (depends on hook type)
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void *callback; // a uc_cb_* type
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void *user_data;
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};
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// hook list offsets
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// mirrors the order of uc_hook_type from include/unicorn/unicorn.h
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enum uc_hook_idx {
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UC_HOOK_INTR_IDX,
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UC_HOOK_INSN_IDX,
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UC_HOOK_CODE_IDX,
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UC_HOOK_BLOCK_IDX,
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UC_HOOK_MEM_READ_UNMAPPED_IDX,
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UC_HOOK_MEM_WRITE_UNMAPPED_IDX,
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UC_HOOK_MEM_FETCH_UNMAPPED_IDX,
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UC_HOOK_MEM_READ_PROT_IDX,
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UC_HOOK_MEM_WRITE_PROT_IDX,
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UC_HOOK_MEM_FETCH_PROT_IDX,
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UC_HOOK_MEM_READ_IDX,
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UC_HOOK_MEM_WRITE_IDX,
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UC_HOOK_MEM_FETCH_IDX,
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UC_HOOK_MEM_READ_AFTER_IDX,
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UC_HOOK_INSN_INVALID_IDX,
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UC_HOOK_MAX,
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};
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#define HOOK_FOREACH_VAR_DECLARE \
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struct list_item *cur
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// for loop macro to loop over hook lists
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#define HOOK_FOREACH(uc, hh, idx) \
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for ( \
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cur = (uc)->hook[idx##_IDX].head; \
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cur != NULL && ((hh) = (struct hook *)cur->data) \
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/* stop excuting callbacks on stop request */ \
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&& !uc->stop_request; \
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cur = cur->next)
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// if statement to check hook bounds
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#define HOOK_BOUND_CHECK(hh, addr) \
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((((addr) >= (hh)->begin && (addr) <= (hh)->end) \
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|| (hh)->begin > (hh)->end))
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#define HOOK_EXISTS(uc, idx) ((uc)->hook[idx##_IDX].head != NULL)
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#define HOOK_EXISTS_BOUNDED(uc, idx, addr) _hook_exists_bounded((uc)->hook[idx##_IDX].head, addr)
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static inline bool _hook_exists_bounded(struct list_item *cur, uint64_t addr)
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{
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while (cur != NULL) {
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if (HOOK_BOUND_CHECK((struct hook *)cur->data, addr))
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return true;
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cur = cur->next;
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}
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return false;
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}
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//relloc increment, KEEP THIS A POWER OF 2!
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#define MEM_BLOCK_INCR 32
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struct uc_struct {
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uc_arch arch;
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uc_mode mode;
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uc_err errnum; // qemu/cpu-exec.c
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AddressSpace as;
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query_t query;
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reg_read_t reg_read;
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reg_write_t reg_write;
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reg_reset_t reg_reset;
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uc_write_mem_t write_mem;
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uc_read_mem_t read_mem;
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uc_args_void_t release; // release resource when uc_close()
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uc_args_uc_u64_t set_pc; // set PC for tracecode
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uc_args_int_t stop_interrupt; // check if the interrupt should stop emulation
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uc_args_uc_t init_arch, cpu_exec_init_all;
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uc_cpu_exec_exit_t cpu_exec_exit;
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uc_args_int_uc_t vm_start;
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uc_args_tcg_enable_t tcg_enabled;
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uc_args_uc_long_t tcg_exec_init;
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uc_args_uc_ram_size_t memory_map;
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uc_args_uc_ram_size_ptr_t memory_map_ptr;
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uc_mem_unmap_t memory_unmap;
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uc_readonly_mem_t readonly_mem;
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uc_mem_redirect_t mem_redirect;
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// TODO: remove current_cpu, as it's a flag for something else ("cpu running"?)
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CPUState *cpu, *current_cpu;
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uc_insn_hook_validate insn_hook_validate;
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// qemu/cpus.c
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bool mttcg_enabled;
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// qemu/exec.c
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MemoryRegion *system_memory;
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MemoryRegion io_mem_rom;
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MemoryRegion io_mem_notdirty;
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MemoryRegion io_mem_unassigned;
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MemoryRegion io_mem_watch;
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RAMList ram_list;
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// Renamed from "alloc_hint" in qemu.
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unsigned phys_map_node_alloc_hint;
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// Used when a target's page bits can vary
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int target_page_bits;
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bool target_page_bits_decided;
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// qemu/cpu-exec.c
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BounceBuffer bounce;
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CPUState *tcg_current_rr_cpu;
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// qemu/user-exec.c
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uintptr_t helper_retaddr;
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// qemu/memory.c
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FlatView *empty_view;
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GHashTable *flat_views;
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bool global_dirty_log;
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/* This is a multi-level map on the virtual address space.
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The bottom level has pointers to PageDesc. */
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void **l1_map; // qemu/translate-all.c
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size_t l1_map_size;
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int v_l1_size;
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int v_l1_shift;
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int v_l2_levels;
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uintptr_t qemu_real_host_page_size;
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intptr_t qemu_real_host_page_mask;
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uintptr_t qemu_host_page_size;
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intptr_t qemu_host_page_mask;
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/* code generation context */
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void *tcg_ctx; // for "TCGContext tcg_ctx" in qemu/translate-all.c
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bool parallel_cpus; // for "bool parallel_cpus" in qemu/translate-all.c
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/* memory.c */
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unsigned memory_region_transaction_depth;
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bool memory_region_update_pending;
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bool ioeventfd_update_pending;
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QTAILQ_HEAD(memory_listeners, MemoryListener) memory_listeners;
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QTAILQ_HEAD(, AddressSpace) address_spaces;
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MachineState *machine_state;
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// qom/cpu.c
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bool cpu_globals_initialized;
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// qom/object.c
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GHashTable *type_table;
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Type type_interface;
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Object *root;
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Object *owner;
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bool enumerating_types;
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// util/module.c
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ModuleTypeList init_type_list[MODULE_INIT_MAX];
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// hw/intc/apic_common.c
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DeviceState *vapic;
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int apic_no;
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bool mmio_registered;
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bool apic_report_tpr_access;
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// linked lists containing hooks per type
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struct list hook[UC_HOOK_MAX];
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// hook to count number of instructions for uc_emu_start()
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uc_hook count_hook;
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size_t emu_counter; // current counter of uc_emu_start()
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size_t emu_count; // save counter of uc_emu_start()
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uint64_t block_addr; // save the last block address we hooked
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bool init_tcg; // already initialized local TCGv variables?
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bool stop_request; // request to immediately stop emulation - for uc_emu_stop()
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bool quit_request; // request to quit the current TB, but continue to emulate - for uc_mem_protect()
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bool emulation_done; // emulation is done by uc_emu_start()
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bool timed_out; // emulation timed out, uc_emu_start() will result in EC_ERR_TIMEOUT
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QemuThread timer; // timer for emulation timeout
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uint64_t timeout; // timeout for uc_emu_start()
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uint64_t invalid_addr; // invalid address to be accessed
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int invalid_error; // invalid memory code: 1 = READ, 2 = WRITE, 3 = CODE
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uint64_t addr_end; // address where emulation stops (@end param of uc_emu_start())
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int thumb; // thumb mode for ARM
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// full TCG cache leads to middle-block break in the last translation?
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bool block_full;
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int size_arg; // what tcg arg slot do we need to update with the size of the block?
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MemoryRegion **mapped_blocks;
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uint32_t mapped_block_count;
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uint32_t mapped_block_cache_index;
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void *qemu_thread_data; // to support cross compile to Windows (qemu-thread-win32.c)
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uint32_t target_page_size;
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uint32_t target_page_align;
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uint64_t next_pc; // save next PC for some special cases
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bool hook_insert; // insert new hook at begin of the hook list (append by default)
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// util/cacheinfo.c
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int qemu_icache_linesize;
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int qemu_dcache_linesize;
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};
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// Metadata stub for the variable-size cpu context used with uc_context_*()
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struct uc_context {
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size_t size;
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char data[0];
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};
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// check if this address is mapped in (via uc_mem_map())
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MemoryRegion *memory_mapping(struct uc_struct* uc, uint64_t address);
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// Defined in util/cacheinfo.c. Made externally linked to
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// allow calling it directly.
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void init_cache_info(struct uc_struct *uc);
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#endif
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/* vim: set ts=4 noet: */
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