Michael Clark 2e0c040062 RISC-V: Allow interrupt controllers to claim interrupts ... We can't allow the supervisor to control SEIP as this would allow the supervisor to clear a pending external interrupt which will result in lost a interrupt in the case a PLIC is attached. The SEIP bit must be hardware controlled when a PLIC is attached. This logic was previously hard-coded so SEIP was always masked even if no PLIC was attached. This patch adds riscv_cpu_claim_interrupts so that the PLIC can register control of SEIP. In the case of models without a PLIC (spike), the SEIP bit remains software controlled. This interface allows for hardware control of supervisor timer and software interrupts by other interrupt controller models. Backports commit e3e7039cc24ecf47d81c091e8bb04552d6564ad8 from qemu		2019-03-19 23:48:12 -04:00
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accel
crypto
default-configs	target/riscv: Initial introduction of the RISC-V target	2019-03-08 21:46:10 -05:00
docs
fpu	qemu/fpu: Synchronize with Qemu	2019-03-09 18:27:31 -05:00
hw	target/riscv: Initial introduction of the RISC-V target	2019-03-08 21:46:10 -05:00
include	qemu/fpu: Synchronize with Qemu	2019-03-09 18:27:31 -05:00
qapi
qobject
qom
scripts	decodetree: Properly diagnose fields overflowing an insn	2019-03-13 11:21:04 -04:00
target	RISC-V: Allow interrupt controllers to claim interrupts	2019-03-19 23:48:12 -04:00
tcg	target/riscv: Initial introduction of the RISC-V target	2019-03-08 21:46:10 -05:00
util
aarch64.h	qemu/fpu: Synchronize with Qemu	2019-03-09 18:27:31 -05:00
aarch64eb.h	qemu/fpu: Synchronize with Qemu	2019-03-09 18:27:31 -05:00
accel.c
arm.h	qemu/fpu: Synchronize with Qemu	2019-03-09 18:27:31 -05:00
armeb.h	qemu/fpu: Synchronize with Qemu	2019-03-09 18:27:31 -05:00
CODING_STYLE
configure	configure: Disable W^X on OpenBSD	2019-03-11 16:46:52 -04:00
COPYING
COPYING.LIB
cpus.c
exec.c	exec.c: refactor function flatview_add_to_dispatch()	2019-03-11 17:00:46 -04:00
gen_all_header.sh
glib_compat.c
HACKING
header_gen.py	RISC-V: Allow interrupt controllers to claim interrupts	2019-03-19 23:48:12 -04:00
ioport.c
LICENSE
m68k.h	qemu/fpu: Synchronize with Qemu	2019-03-09 18:27:31 -05:00
Makefile
Makefile.objs
Makefile.target
memory.c
memory_ldst.inc.c
memory_mapping.c
mips.h	qemu/fpu: Synchronize with Qemu	2019-03-09 18:27:31 -05:00
mips64.h	qemu/fpu: Synchronize with Qemu	2019-03-09 18:27:31 -05:00
mips64el.h	qemu/fpu: Synchronize with Qemu	2019-03-09 18:27:31 -05:00
mipsel.h	qemu/fpu: Synchronize with Qemu	2019-03-09 18:27:31 -05:00
powerpc.h	qemu/fpu: Synchronize with Qemu	2019-03-09 18:27:31 -05:00
qemu-timer.c
riscv32.h	RISC-V: Allow interrupt controllers to claim interrupts	2019-03-19 23:48:12 -04:00
riscv64.h	RISC-V: Allow interrupt controllers to claim interrupts	2019-03-19 23:48:12 -04:00
rules.mak
sparc.h	qemu/fpu: Synchronize with Qemu	2019-03-09 18:27:31 -05:00
sparc64.h	qemu/fpu: Synchronize with Qemu	2019-03-09 18:27:31 -05:00
unicorn_common.h
VERSION
vl.c
vl.h
x86_64.h	qemu/fpu: Synchronize with Qemu	2019-03-09 18:27:31 -05:00