mirror of
https://github.com/yuzu-emu/unicorn
synced 2024-11-25 12:49:00 +00:00
167 lines
4.3 KiB
C
167 lines
4.3 KiB
C
/*
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* QEMU PC System Emulator
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*
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* Copyright (c) 2003-2004 Fabrice Bellard
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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/* Modified for Unicorn Engine by Nguyen Anh Quynh, 2015 */
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#include "hw/hw.h"
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#include "hw/i386/pc.h"
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#include "sysemu/sysemu.h"
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#include "qapi-visit.h"
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/* XXX: add IGNNE support */
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void cpu_set_ferr(CPUX86State *s)
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{
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// qemu_irq_raise(ferr_irq);
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}
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/* TSC handling */
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uint64_t cpu_get_tsc(CPUX86State *env)
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{
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return cpu_get_ticks();
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}
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/* SMM support */
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static cpu_set_smm_t smm_set;
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static void *smm_arg;
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void cpu_smm_register(cpu_set_smm_t callback, void *arg)
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{
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assert(smm_set == NULL);
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assert(smm_arg == NULL);
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smm_set = callback;
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smm_arg = arg;
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}
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void cpu_smm_update(CPUX86State *env)
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{
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struct uc_struct *uc = x86_env_get_cpu(env)->parent_obj.uc;
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if (smm_set && smm_arg && CPU(x86_env_get_cpu(env)) == uc->cpu) {
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smm_set(!!(env->hflags & HF_SMM_MASK), smm_arg);
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}
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}
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/* IRQ handling */
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int cpu_get_pic_interrupt(CPUX86State *env)
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{
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X86CPU *cpu = x86_env_get_cpu(env);
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int intno;
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intno = apic_get_interrupt(cpu->apic_state);
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if (intno >= 0) {
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return intno;
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}
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/* read the irq from the PIC */
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if (!apic_accept_pic_intr(cpu->apic_state)) {
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return -1;
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}
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return 0;
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}
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DeviceState *cpu_get_current_apic(struct uc_struct *uc)
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{
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if (uc->current_cpu) {
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X86CPU *cpu = X86_CPU(uc, uc->current_cpu);
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return cpu->apic_state;
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} else {
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return NULL;
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}
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}
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static X86CPU *pc_new_cpu(struct uc_struct *uc, const char *cpu_model, int64_t apic_id,
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Error **errp)
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{
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X86CPU *cpu;
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Error *local_err = NULL;
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cpu = cpu_x86_create(uc, cpu_model, &local_err);
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if (local_err != NULL) {
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error_propagate(errp, local_err);
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return NULL;
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}
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object_property_set_int(uc, OBJECT(cpu), apic_id, "apic-id", &local_err);
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object_property_set_bool(uc, OBJECT(cpu), true, "realized", &local_err);
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if (local_err) {
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error_propagate(errp, local_err);
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object_unref(uc, OBJECT(cpu));
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cpu = NULL;
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}
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return cpu;
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}
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int pc_cpus_init(struct uc_struct *uc, const char *cpu_model)
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{
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int i;
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Error *error = NULL;
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/* init CPUs */
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if (cpu_model == NULL) {
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#ifdef TARGET_X86_64
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cpu_model = "qemu64";
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#else
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cpu_model = "qemu32";
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#endif
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}
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for (i = 0; i < smp_cpus; i++) {
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uc->cpu = (CPUState *)pc_new_cpu(uc, cpu_model, x86_cpu_apic_id_from_index(i), &error);
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if (error) {
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//error_report("%s", error_get_pretty(error));
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error_free(error);
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return -1;
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}
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}
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return 0;
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}
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static void pc_machine_initfn(struct uc_struct *uc, Object *obj, void *opaque)
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{
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}
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static void pc_machine_class_init(struct uc_struct *uc, ObjectClass *oc, void *data)
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{
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}
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static const TypeInfo pc_machine_info = {
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.name = TYPE_PC_MACHINE,
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.parent = TYPE_MACHINE,
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.abstract = true,
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.instance_size = sizeof(PCMachineState),
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.instance_init = pc_machine_initfn,
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.class_size = sizeof(PCMachineClass),
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.class_init = pc_machine_class_init,
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.interfaces = (InterfaceInfo[]) {
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{ }
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},
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};
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void pc_machine_register_types(struct uc_struct *uc)
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{
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type_register_static(uc, &pc_machine_info);
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}
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