Elton G 47150b6df3 reg_read and reg_write now work with registers W0 through W30 in Aarch64 (#716) ... * reg_read and reg_write now work with registers W0 through W30 in Aarch64 emulaton * Added a regress test for the ARM64 reg_read and reg_write on 32-bit registers (W0-W30) Added a new macro in uc_priv.h (WRITE_DWORD_TO_QWORD), in order to write to the lower 32 bits of a 64 bit value without overwriting the whole value when using reg_write * Fixed WRITE_DWORD macro reg_write would zero out the high order bits when writing to 32 bit registers e.g. uc.reg_write(UC_X86_REG_EAX, 0) would also set register RAX to zero		2017-01-15 20:13:35 +08:00
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regress	reg_read and reg_write now work with registers W0 through W30 in Aarch64 (#716)	2017-01-15 20:13:35 +08:00
unit	rename API uc_mem_free() to uc_free(). see #662	2017-01-10 20:59:14 +08:00