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Aurelien Jarno 5f0920ad0f
tcg/optimize: allow constant to have copies 
Now that copies and constants are tracked separately, we can allow
constant to have copies, deferring the choice to use a register or a
constant to the register allocation pass. This prevent this kind of
regular constant reloading:

-OUT: [size=338]
+OUT: [size=298]
   mov    -0x4(%r14),%ebp
   test   %ebp,%ebp
   jne    0x7ffbe9cb0ed6
   mov    $0x40002219f8,%rbp
   mov    %rbp,(%r14)
-  mov    $0x40002219f8,%rbp
   mov    $0x4000221a20,%rbx
   mov    %rbp,(%rbx)
   mov    $0x4000000000,%rbp
   mov    %rbp,(%r14)
-  mov    $0x4000000000,%rbp
   mov    $0x4000221d38,%rbx
   mov    %rbp,(%rbx)
   mov    $0x40002221a8,%rbp
   mov    %rbp,(%r14)
-  mov    $0x40002221a8,%rbp
   mov    $0x4000221d40,%rbx
   mov    %rbp,(%rbx)
   mov    $0x4000019170,%rbp
   mov    %rbp,(%r14)
-  mov    $0x4000019170,%rbp
   mov    $0x4000221d48,%rbx
   mov    %rbp,(%rbx)
   mov    $0x40000049ee,%rbp
   mov    %rbp,0x80(%r14)
   mov    %r14,%rdi
   callq  0x7ffbe99924d0
   mov    $0x4000001680,%rbp
   mov    %rbp,0x30(%r14)
   mov    0x10(%r14),%rbp
   mov    $0x4000001680,%rbp
   mov    %rbp,0x30(%r14)
   mov    0x10(%r14),%rbp
   shl    $0x20,%rbp
   mov    (%r14),%rbx
   mov    %ebx,%ebx
   mov    %rbx,(%r14)
   or     %rbx,%rbp
   mov    %rbp,0x10(%r14)
   mov    %rbp,0x90(%r14)
   mov    0x60(%r14),%rbx
   mov    %rbx,0x38(%r14)
   mov    0x28(%r14),%rbx
   mov    $0x4000220e60,%r12
   mov    %rbx,(%r12)
   mov    $0x40002219c8,%rbx
   mov    %rbp,(%rbx)
   mov    0x20(%r14),%rbp
   sub    $0x8,%rbp
   mov    $0x4000004a16,%rbx
   mov    %rbx,0x0(%rbp)
   mov    %rbp,0x20(%r14)
   mov    $0x19,%ebp
   mov    %ebp,0xa8(%r14)
   mov    $0x4000015110,%rbp
   mov    %rbp,0x80(%r14)
   xor    %eax,%eax
   jmpq   0x7ffbebcae426
   lea    -0x5f6d72a(%rip),%rax        # 0x7ffbe3d437b3
   jmpq   0x7ffbebcae426

Backports commit 299f80130401153af1a6ddb3cc011781bcd47600 from qemu
2018-02-10 22:18:03 -05:00
..
default-configs arm64eb: add support for ARM64 big endian. 2017-04-24 23:30:01 +08:00
docs cleanup qemu docs 2017-01-18 15:23:40 +08:00
fpu Automated leading tab to spaces conversion. 2017-01-21 12:28:22 +11:00
hw Arm support ported. (#736) 2017-01-23 23:30:57 +08:00
include tcg: Change translator-side labels to a pointer 2018-02-09 14:17:56 -05:00
qapi This code should now build the x86_x64-softmmu part 2. 2017-01-19 22:50:28 +11:00
qobject This code should now build the x86_x64-softmmu part 2. 2017-01-19 22:50:28 +11:00
qom cleanup after msvc port 2017-01-22 21:27:17 +08:00
scripts Save copies of generated qapi files. 2017-01-21 00:30:50 +11:00
target-arm tcg: Push merged memop+mmu_idx parameter to softmmu routines 2018-02-10 20:03:22 -05:00
target-i386 tcg: Change translator-side labels to a pointer 2018-02-09 14:17:56 -05:00
target-m68k tcg: Change translator-side labels to a pointer 2018-02-09 14:17:56 -05:00
target-mips target-mips: Use CPU_LOG_INT for logging related to interrupts 2018-02-10 21:12:41 -05:00
target-sparc tcg: Change translator-side labels to a pointer 2018-02-09 14:17:56 -05:00
tcg tcg/optimize: allow constant to have copies 2018-02-10 22:18:03 -05:00
util Arm support ported. (#736) 2017-01-23 23:30:57 +08:00
aarch64.h tcg: Implement insert_op_before 2018-02-09 13:11:50 -05:00
aarch64eb.h tcg: Implement insert_op_before 2018-02-09 13:11:50 -05:00
accel.c Automated leading tab to spaces conversion. 2017-01-21 12:28:22 +11:00
arm.h tcg: Implement insert_op_before 2018-02-09 13:11:50 -05:00
armeb.h tcg: Implement insert_op_before 2018-02-09 13:11:50 -05:00
CODING_STYLE
configure tcg: Drop ia64 host support 2018-02-04 18:33:02 -05:00
COPYING
COPYING.LIB
cpu-exec.c Only set eip to the instruction pointer after an interrupt if the interrupt was user-generated (#875) 2017-08-29 17:14:36 +07:00
cpus.c cleanup more synchronization code 2017-01-09 14:05:39 +08:00
cputlb.c This code should now build the x86_x64-softmmu part 2. 2017-01-19 22:50:28 +11:00
exec.c fix the last fix that crashes samples 2017-02-24 20:34:52 +08:00
gen_all_header.sh arm64eb: add support for ARM64 big endian. 2017-04-24 23:30:01 +08:00
glib_compat.c Merge branch 'master' into msvc2 2017-04-21 01:17:00 +08:00
HACKING
header_gen.py tcg: Implement insert_op_before 2018-02-09 13:11:50 -05:00
ioport.c This code should now build the x86_x64-softmmu part 2. 2017-01-19 22:50:28 +11:00
LICENSE
m68k.h tcg: Implement insert_op_before 2018-02-09 13:11:50 -05:00
Makefile cleanup qemu/default-configs/ 2017-01-19 14:52:30 +08:00
Makefile.objs cleanup qemu/Makefile.objs 2017-01-21 21:50:12 +08:00
Makefile.target tcg: Move some opcode generation functions out of line 2018-02-09 08:10:00 -05:00
memory.c merge msvc with master 2017-02-24 10:39:36 +08:00
memory_mapping.c revert to use of g_free to make future qemu integrations easier (#695) 2016-12-21 22:28:36 +08:00
mips.h tcg: Implement insert_op_before 2018-02-09 13:11:50 -05:00
mips64.h tcg: Implement insert_op_before 2018-02-09 13:11:50 -05:00
mips64el.h tcg: Implement insert_op_before 2018-02-09 13:11:50 -05:00
mipsel.h tcg: Implement insert_op_before 2018-02-09 13:11:50 -05:00
powerpc.h tcg: Implement insert_op_before 2018-02-09 13:11:50 -05:00
qapi-schema.json
qemu-log.c
qemu-timer.c timer is redundant 2017-01-20 16:46:58 +08:00
rules.mak
softmmu_template.h tcg: Add MO_ALIGN, MO_UNALN 2018-02-10 20:18:53 -05:00
sparc.h tcg: Implement insert_op_before 2018-02-09 13:11:50 -05:00
sparc64.h tcg: Implement insert_op_before 2018-02-09 13:11:50 -05:00
tcg-runtime.c platform.h move #3 2017-01-21 00:13:21 +11:00
translate-all.c Fixed warning about {} initialisers. 2017-01-21 11:41:11 +11:00
translate-all.h
unicorn_common.h This code should now build the x86_x64-softmmu part 2. 2017-01-19 22:50:28 +11:00
VERSION
vl.c This code should now build the x86_x64-softmmu part 2. 2017-01-19 22:50:28 +11:00
vl.h
x86_64.h tcg: Implement insert_op_before 2018-02-09 13:11:50 -05:00