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unicorn/qemu
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Jim Wilson 65903cf9a4
RISC-V: Add debug support for accessing CSRs. 
Add a debugger field to CPURISCVState. Add riscv_csrrw_debug function
to set it. Disable mode checks when debugger field true.

Backports commit 753e3fe207db08ce0ef0405e8452c3397c9b9308 from qemu
2019-03-19 23:42:48 -04:00
..
accel cputlb: update TLB entry/index after tlb_fill 2019-02-12 11:48:48 -05:00
crypto
default-configs target/riscv: Initial introduction of the RISC-V target 2019-03-08 21:46:10 -05:00
docs
fpu qemu/fpu: Synchronize with Qemu 2019-03-09 18:27:31 -05:00
hw target/riscv: Initial introduction of the RISC-V target 2019-03-08 21:46:10 -05:00
include qemu/fpu: Synchronize with Qemu 2019-03-09 18:27:31 -05:00
qapi qapi: Rewrite string-input-visitor's integer and list parsing 2018-12-18 04:57:25 -05:00
qobject
qom qom/cpu: Add cluster_index to CPUState 2019-01-30 12:59:59 -05:00
scripts decodetree: Properly diagnose fields overflowing an insn 2019-03-13 11:21:04 -04:00
target RISC-V: Add debug support for accessing CSRs. 2019-03-19 23:42:48 -04:00
tcg target/riscv: Initial introduction of the RISC-V target 2019-03-08 21:46:10 -05:00
util mmap-alloc: fix hugetlbfs misaligned length in ppc64 2019-02-05 16:52:39 -05:00
aarch64.h qemu/fpu: Synchronize with Qemu 2019-03-09 18:27:31 -05:00
aarch64eb.h qemu/fpu: Synchronize with Qemu 2019-03-09 18:27:31 -05:00
accel.c
arm.h qemu/fpu: Synchronize with Qemu 2019-03-09 18:27:31 -05:00
armeb.h qemu/fpu: Synchronize with Qemu 2019-03-09 18:27:31 -05:00
CODING_STYLE
configure configure: Disable W^X on OpenBSD 2019-03-11 16:46:52 -04:00
COPYING
COPYING.LIB
cpus.c
exec.c exec.c: refactor function flatview_add_to_dispatch() 2019-03-11 17:00:46 -04:00
gen_all_header.sh
glib_compat.c target/arm: expose remaining CPUID registers as RAZ 2019-02-15 17:48:37 -05:00
HACKING
header_gen.py RISC-V: Add debug support for accessing CSRs. 2019-03-19 23:42:48 -04:00
ioport.c
LICENSE
m68k.h qemu/fpu: Synchronize with Qemu 2019-03-09 18:27:31 -05:00
Makefile
Makefile.objs
Makefile.target configure: Remove old -fno-gcse workaround for GCC 4.6.x and 4.7.[012] 2018-12-18 03:52:36 -05:00
memory.c memory: learn about non-volatile memory region 2018-11-11 08:50:39 -05:00
memory_ldst.inc.c
memory_mapping.c
mips.h qemu/fpu: Synchronize with Qemu 2019-03-09 18:27:31 -05:00
mips64.h qemu/fpu: Synchronize with Qemu 2019-03-09 18:27:31 -05:00
mips64el.h qemu/fpu: Synchronize with Qemu 2019-03-09 18:27:31 -05:00
mipsel.h qemu/fpu: Synchronize with Qemu 2019-03-09 18:27:31 -05:00
powerpc.h qemu/fpu: Synchronize with Qemu 2019-03-09 18:27:31 -05:00
qemu-timer.c
riscv32.h RISC-V: Add debug support for accessing CSRs. 2019-03-19 23:42:48 -04:00
riscv64.h RISC-V: Add debug support for accessing CSRs. 2019-03-19 23:42:48 -04:00
rules.mak
sparc.h qemu/fpu: Synchronize with Qemu 2019-03-09 18:27:31 -05:00
sparc64.h qemu/fpu: Synchronize with Qemu 2019-03-09 18:27:31 -05:00
unicorn_common.h
VERSION Open 4.0 development tree 2018-12-11 20:33:45 -05:00
vl.c
vl.h
x86_64.h qemu/fpu: Synchronize with Qemu 2019-03-09 18:27:31 -05:00