unicorn/qemu/target-arm
Peter Maydell 6c8b7e0fed
target-arm: Honour NS bits in page tables
Honour the NS bit in ARM page tables:
* when adding entries to the TLB, include the Secure/NonSecure
transaction attribute
* set the NS bit in the PAR when doing ATS operations

Note that we don't yet correctly use the NSTable bit to
cause the page table walk itself to use the right attributes.

Backports commit 8bf5b6a9c1911d2c8473385fc0cebfaaeef42dbc from qem
2018-02-12 20:36:35 -05:00
..
arm_ldst.h
cpu-qom.h target-arm: Add ARMCPU secure property 2018-02-12 10:40:52 -05:00
cpu.c target-arm: Add CPU property to disable AArch64 2018-02-12 13:56:44 -05:00
cpu.h target-arm: Add 32/64-bit register sync 2018-02-12 14:57:20 -05:00
cpu64.c target-arm: Add CPU property to disable AArch64 2018-02-12 13:56:44 -05:00
crypto_helper.c target-arm: crypto: fix BE host support 2018-02-12 10:40:52 -05:00
helper-a64.c target-arm: Store SPSR_EL1 state in banked_spsr[1] (SPSR_svc) 2018-02-12 16:36:44 -05:00
helper-a64.h
helper.c target-arm: Honour NS bits in page tables 2018-02-12 20:36:35 -05:00
helper.h
internals.h target-arm: Store SPSR_EL1 state in banked_spsr[1] (SPSR_svc) 2018-02-12 16:36:44 -05:00
iwmmxt_helper.c
kvm-consts.h
Makefile.objs
neon_helper.c
op_addsub.h
op_helper.c target-arm: Add 32/64-bit register sync 2018-02-12 14:57:20 -05:00
psci.c
translate-a64.c target-arm: A64: Avoid signed shifts in disas_ldst_pair() 2018-02-12 15:05:09 -05:00
translate.c target-arm: Avoid buffer overrun on UNPREDICTABLE ldrd/strd 2018-02-12 17:17:23 -05:00
translate.h target-arm: Define correct mmu_idx values and pass them in TB flags 2018-02-12 11:21:19 -05:00
unicorn.h arm64eb: add support for ARM64 big endian. 2017-04-24 23:30:01 +08:00
unicorn_aarch64.c target-arm: make c13 cp regs banked (FCSEIDR, ...) 2018-02-12 10:40:51 -05:00
unicorn_arm.c fix conflicts 2017-03-30 12:23:24 +08:00