unicorn/qemu/target-mips
Leon Alrae f60eca6930
target-mips: generate fences
Make use of memory barrier TCG opcode in MIPS front end.

Backports commit d208ac0c2e4cb43b74153bd584fc63c7b8a93ed6 from qemu
2018-02-26 03:52:35 -05:00
..
cpu-qom.h
cpu.c cpu: move exec-all.h inclusion out of cpu.h 2018-02-24 02:39:08 -05:00
cpu.h target-*: Clean up cpu.h header guards 2018-02-25 04:12:46 -05:00
dsp_helper.c
helper.c target-mips: fix EntryHi.EHINV being cleared on TLB exception 2018-02-25 21:02:31 -05:00
helper.h target-mips: Add nan2008 flavor of <CEIL|CVT|FLOOR|ROUND|TRUNC>.<L|W>.<S|D> 2018-02-24 21:14:04 -05:00
lmi_helper.c
Makefile.objs
mips-defs.h Clean up ill-advised or unusual header guards 2018-02-25 04:22:46 -05:00
msa_helper.c softfloat: Implement run-time-configurable meaning of signaling NaN bit 2018-02-24 20:27:12 -05:00
op_helper.c tcg: Merge GETPC and GETRA 2018-02-26 02:54:44 -05:00
TODO
translate.c target-mips: generate fences 2018-02-26 03:52:35 -05:00
translate_init.c target-mips: add 24KEc CPU definition 2018-02-26 03:50:22 -05:00
unicorn.c qemu-common: push cpu.h inclusion out of qemu-common.h 2018-02-24 01:50:56 -05:00
unicorn.h