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unicorn/qemu/target/mips
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Igor Mammedov 97b525a794
mips: MIPSCPU model subclasses 
Register separate QOM types for each mips cpu model,
so it would be possible to reuse generic CPU creation
routines.

Backports commit 41da212c9ce9482fcfd490170c2611470254f8dc from qemu
2018-03-05 00:42:29 -05:00
..
cp0_timer.c mips: introduce internal.h and cleanup cpu.h 2018-03-05 00:25:56 -05:00
cpu-qom.h mips: MIPSCPU model subclasses 2018-03-05 00:42:29 -05:00
cpu.c mips: MIPSCPU model subclasses 2018-03-05 00:42:29 -05:00
cpu.h mips: introduce internal.h and cleanup cpu.h 2018-03-05 00:25:56 -05:00
dsp_helper.c
helper.c mips: introduce internal.h and cleanup cpu.h 2018-03-05 00:25:56 -05:00
helper.h target/mips: Add segmentation control registers 2018-03-04 01:00:42 -05:00
internal.h mips: MIPSCPU model subclasses 2018-03-05 00:42:29 -05:00
lmi_helper.c
Makefile.objs mips: introduce internal.h and cleanup cpu.h 2018-03-05 00:25:56 -05:00
mips-defs.h
msa_helper.c mips: introduce internal.h and cleanup cpu.h 2018-03-05 00:25:56 -05:00
op_helper.c mips: introduce internal.h and cleanup cpu.h 2018-03-05 00:25:56 -05:00
TODO
translate.c mips: MIPSCPU model subclasses 2018-03-05 00:42:29 -05:00
translate_init.c mips: MIPSCPU model subclasses 2018-03-05 00:42:29 -05:00
unicorn.c
unicorn.h