unicorn/qemu/riscv32.h

/* Autogen header for Unicorn Engine - DONOT MODIFY */
#ifndef UNICORN_AUTOGEN_RISCV32_H
#define UNICORN_AUTOGEN_RISCV32_H
#define ErrorClass_lookup ErrorClass_lookup_riscv32
#define S0 S0_riscv32
#define S1 S1_riscv32
#define X86CPURegister32_lookup X86CPURegister32_lookup_riscv32
#define _DYNAMIC _DYNAMIC_riscv32
#define _GLOBAL_OFFSET_TABLE_ _GLOBAL_OFFSET_TABLE__riscv32
#define __jit_debug_descriptor __jit_debug_descriptor_riscv32
#define __jit_debug_register_code __jit_debug_register_code_riscv32
#define _edata _edata_riscv32
#define _end _end_riscv32
#define _fini _fini_riscv32
#define _init _init_riscv32
#define a15_l2ctlr_read a15_l2ctlr_read_riscv32
#define a64_translate_init a64_translate_init_riscv32
#define aa32_generate_debug_exceptions aa32_generate_debug_exceptions_riscv32
#define aa64_cacheop_access aa64_cacheop_access_riscv32
#define aa64_daif_access aa64_daif_access_riscv32
#define aa64_daif_write aa64_daif_write_riscv32
#define aa64_dczid_read aa64_dczid_read_riscv32
#define aa64_fpcr_read aa64_fpcr_read_riscv32
#define aa64_fpcr_write aa64_fpcr_write_riscv32
#define aa64_fpsr_read aa64_fpsr_read_riscv32
#define aa64_fpsr_write aa64_fpsr_write_riscv32
#define aa64_generate_debug_exceptions aa64_generate_debug_exceptions_riscv32
#define aa64_zva_access aa64_zva_access_riscv32
#define aarch64_banked_spsr_index aarch64_banked_spsr_index_riscv32
#define aarch64_restore_sp aarch64_restore_sp_riscv32
#define aarch64_save_sp aarch64_save_sp_riscv32
#define aarch64_sync_32_to_64 aarch64_sync_32_to_64_riscv32
#define aarch64_sync_64_to_32 aarch64_sync_64_to_32_riscv32
#define aarch64_tb_set_jmp_target aarch64_tb_set_jmp_target_riscv32
#define accel_find accel_find_riscv32
#define accel_init_machine accel_init_machine_riscv32
#define accel_type accel_type_riscv32
#define access_with_adjusted_size access_with_adjusted_size_riscv32
#define add128 add128_riscv32
#define add16_sat add16_sat_riscv32
#define add16_usat add16_usat_riscv32
#define add192 add192_riscv32
#define add8_sat add8_sat_riscv32
#define add8_usat add8_usat_riscv32
#define addFloat128Sigs addFloat128Sigs_riscv32
#define addFloat32Sigs addFloat32Sigs_riscv32
#define addFloat64Sigs addFloat64Sigs_riscv32
#define addFloatx80Sigs addFloatx80Sigs_riscv32
#define add_cpreg_to_hashtable add_cpreg_to_hashtable_riscv32
#define add_cpreg_to_list add_cpreg_to_list_riscv32
#define add_qemu_ldst_label add_qemu_ldst_label_riscv32
#define address_space_access_valid address_space_access_valid_riscv32
#define address_space_cache_destroy address_space_cache_destroy_riscv32
#define address_space_cache_init address_space_cache_init_riscv32
#define address_space_cache_invalidate address_space_cache_invalidate_riscv32
#define address_space_destroy address_space_destroy_riscv32
#define address_space_dispatch_compact address_space_dispatch_compact_riscv32
#define address_space_dispatch_free address_space_dispatch_free_riscv32
#define address_space_dispatch_new address_space_dispatch_new_riscv32
#define address_space_get_flatview address_space_get_flatview_riscv32
#define address_space_init address_space_init_riscv32
#define address_space_init_dispatch address_space_init_dispatch_riscv32
#define address_space_get_iotlb_entry address_space_get_iotlb_entry_riscv32
#define address_space_ldl address_space_ldl_riscv32
#define address_space_ldl_be address_space_ldl_be_riscv32
#define address_space_ldl_be_cached address_space_ldl_be_cached_riscv32
#define address_space_ldl_cached address_space_ldl_cached_riscv32
#define address_space_ldl_le address_space_ldl_le_riscv32
#define address_space_ldl_le_cached address_space_ldl_le_cached_riscv32
#define address_space_ldq address_space_ldq_riscv32
#define address_space_ldq_be address_space_ldq_be_riscv32
#define address_space_ldq_be_cached address_space_ldq_be_cached_riscv32
#define address_space_ldq_cached address_space_ldq_cached_riscv32
#define address_space_ldq_le address_space_ldq_le_riscv32
#define address_space_ldq_le_cached address_space_ldq_le_cached_riscv32
#define address_space_ldub address_space_ldub_riscv32
#define address_space_ldub_cached address_space_ldub_cached_riscv32
#define address_space_lduw address_space_lduw_riscv32
#define address_space_lduw_be address_space_lduw_be_riscv32
#define address_space_lduw_be_cached address_space_lduw_be_cached_riscv32
#define address_space_lduw_cached address_space_lduw_cached_riscv32
#define address_space_lduw_le address_space_lduw_le_riscv32
#define address_space_lduw_le_cached address_space_lduw_le_cached_riscv32
#define address_space_lookup_region address_space_lookup_region_riscv32
#define address_space_map address_space_map_riscv32
#define address_space_rw address_space_rw_riscv32
#define address_space_stb address_space_stb_riscv32
#define address_space_stb_cached address_space_stb_cached_riscv32
#define address_space_stl address_space_stl_riscv32
#define address_space_stl_be address_space_stl_be_riscv32
#define address_space_stl_be_cached address_space_stl_be_cached_riscv32
#define address_space_stl_cached address_space_stl_cached_riscv32
#define address_space_stl_le address_space_stl_le_riscv32
#define address_space_stl_le_cached address_space_stl_le_cached_riscv32
#define address_space_stl_notdirty address_space_stl_notdirty_riscv32
#define address_space_stl_notdirty_cached address_space_stl_notdirty_cached_riscv32
#define address_space_stq address_space_stq_riscv32
#define address_space_stq_be address_space_stq_be_riscv32
#define address_space_stq_be_cached address_space_stq_be_cached_riscv32
#define address_space_stq_cached address_space_stq_cached_riscv32
#define address_space_stq_le address_space_stq_le_riscv32
#define address_space_stq_le_cached address_space_stq_le_cached_riscv32
#define address_space_stw address_space_stw_riscv32
#define address_space_stw_be address_space_stw_be_riscv32
#define address_space_stw_be_cached address_space_stw_be_cached_riscv32
#define address_space_stw_cached address_space_stw_cached_riscv32
#define address_space_stw_le address_space_stw_le_riscv32
#define address_space_stw_le_cached address_space_stw_le_cached_riscv32
#define address_space_to_dispatch address_space_to_dispatch_riscv32
#define address_space_to_flatview address_space_to_flatview_riscv32
#define address_space_translate_for_iotlb address_space_translate_for_iotlb_riscv32
#define address_space_translate_internal address_space_translate_internal_riscv32
#define address_space_unmap address_space_unmap_riscv32
#define address_space_unregister address_space_unregister_riscv32
#define address_space_update_topology address_space_update_topology_riscv32
#define address_space_update_topology_pass address_space_update_topology_pass_riscv32
#define address_space_write address_space_write_riscv32
#define addrrange_contains addrrange_contains_riscv32
#define addrrange_end addrrange_end_riscv32
#define addrrange_equal addrrange_equal_riscv32
#define addrrange_intersection addrrange_intersection_riscv32
#define addrrange_intersects addrrange_intersects_riscv32
#define addrrange_make addrrange_make_riscv32
#define adjust_endianness adjust_endianness_riscv32
#define all_helpers all_helpers_riscv32
#define alloc_code_gen_buffer alloc_code_gen_buffer_riscv32
#define alloc_entry alloc_entry_riscv32
#define always_true always_true_riscv32
#define arm1026_initfn arm1026_initfn_riscv32
#define arm1136_initfn arm1136_initfn_riscv32
#define arm1136_r2_initfn arm1136_r2_initfn_riscv32
#define arm1176_initfn arm1176_initfn_riscv32
#define arm11mpcore_initfn arm11mpcore_initfn_riscv32
#define arm926_initfn arm926_initfn_riscv32
#define arm946_initfn arm946_initfn_riscv32
#define arm_adjust_watchpoint_address arm_adjust_watchpoint_address_riscv32
#define arm_ccnt_enabled arm_ccnt_enabled_riscv32
#define arm_cp_read_zero arm_cp_read_zero_riscv32
#define arm_cp_reset_ignore arm_cp_reset_ignore_riscv32
#define arm_cp_write_ignore arm_cp_write_ignore_riscv32
#define arm_cpu_do_interrupt arm_cpu_do_interrupt_riscv32
#define arm_cpu_do_transaction_failed arm_cpu_do_transaction_failed_riscv32
#define arm_cpu_do_unaligned_access arm_cpu_do_unaligned_access_riscv32
#define arm_cpu_exec_interrupt arm_cpu_exec_interrupt_riscv32
#define arm_cpu_finalizefn arm_cpu_finalizefn_riscv32
#define arm_cpu_get_phys_page_attrs_debug arm_cpu_get_phys_page_attrs_debug_riscv32
#define arm_cpu_initfn arm_cpu_initfn_riscv32
#define arm_cpu_list arm_cpu_list_riscv32
#define arm_cpu_post_init arm_cpu_post_init_riscv32
#define arm_cpu_realizefn arm_cpu_realizefn_riscv32
#define arm_cpu_register_gdb_regs_for_features arm_cpu_register_gdb_regs_for_features_riscv32
#define arm_cpu_register_types arm_cpu_register_types_riscv32
#define arm_cpu_set_pc arm_cpu_set_pc_riscv32
#define arm_cpu_update_virq arm_cpu_update_virq_riscv32
#define arm_cpu_update_vfiq arm_cpu_update_vfiq_riscv32
#define arm_cpus arm_cpus_riscv32
#define arm_current_el arm_current_el_riscv32
#define arm_dc_feature arm_dc_feature_riscv32
#define arm_debug_check_watchpoint arm_debug_check_watchpoint_riscv32
#define arm_debug_excp_handler arm_debug_excp_handler_riscv32
#define arm_debug_target_el arm_debug_target_el_riscv32
#define arm_el_is_aa64 arm_el_is_aa64_riscv32
#define arm_env_get_cpu arm_env_get_cpu_riscv32
#define arm_excp_unmasked arm_excp_unmasked_riscv32
#define arm_feature arm_feature_riscv32
#define arm_free_cc arm_free_cc_riscv32
#define arm_gen_test_cc arm_gen_test_cc_riscv32
#define arm_generate_debug_exceptions arm_generate_debug_exceptions_riscv32
#define arm_gt_htimer_cb arm_gt_htimer_cb_riscv32
#define arm_gt_ptimer_cb arm_gt_ptimer_cb_riscv32
#define arm_gt_stimer_cb arm_gt_stimer_cb_riscv32
#define arm_gt_vtimer_cb arm_gt_vtimer_cb_riscv32
#define arm_handle_psci_call arm_handle_psci_call_riscv32
#define arm_is_psci_call arm_is_psci_call_riscv32
#define arm_is_secure arm_is_secure_riscv32
#define arm_is_secure_below_el3 arm_is_secure_below_el3_riscv32
#define arm_jump_cc arm_jump_cc_riscv32
#define arm_ldl_code arm_ldl_code_riscv32
#define arm_lduw_code arm_lduw_code_riscv32
#define arm_log_exception arm_log_exception_riscv32
#define arm_phys_excp_target_el arm_phys_excp_target_el_riscv32
#define arm_reg_read arm_reg_read_riscv32
#define arm_reg_reset arm_reg_reset_riscv32
#define arm_reg_write arm_reg_write_riscv32
#define arm_release arm_release_riscv32
#define arm_rmode_to_sf arm_rmode_to_sf_riscv32
#define arm_s1_regime_using_lpae_format arm_s1_regime_using_lpae_format_riscv32
#define arm_singlestep_active arm_singlestep_active_riscv32
#define arm_test_cc arm_test_cc_riscv32
#define arm_tlb_fill arm_tlb_fill_riscv32
#define arm_translate_init arm_translate_init_riscv32
#define arm_v7m_class_init arm_v7m_class_init_riscv32
#define arm_v7m_cpu_do_interrupt arm_v7m_cpu_do_interrupt_riscv32
#define ats_access ats_access_riscv32
#define ats_write ats_write_riscv32
#define bad_mode_switch bad_mode_switch_riscv32
#define bank_number bank_number_riscv32
#define bitmap_zero_extend bitmap_zero_extend_riscv32
#define bp_wp_matches bp_wp_matches_riscv32
#define breakpoint_invalidate breakpoint_invalidate_riscv32
#define build_page_bitmap build_page_bitmap_riscv32
#define bus_add_child bus_add_child_riscv32
#define bus_class_init bus_class_init_riscv32
#define bus_info bus_info_riscv32
#define bus_unparent bus_unparent_riscv32
#define cache_block_ops_cp_reginfo cache_block_ops_cp_reginfo_riscv32
#define cache_dirty_status_cp_reginfo cache_dirty_status_cp_reginfo_riscv32
#define cache_test_clean_cp_reginfo cache_test_clean_cp_reginfo_riscv32
#define call_recip_estimate call_recip_estimate_riscv32
#define can_merge can_merge_riscv32
#define capacity_increase capacity_increase_riscv32
#define ccsidr_read ccsidr_read_riscv32
#define check_ap check_ap_riscv32
#define check_breakpoints check_breakpoints_riscv32
#define check_exit_request check_exit_request_riscv32
#define check_watchpoints check_watchpoints_riscv32
#define cho cho_riscv32
#define clear_bit clear_bit_riscv32
#define clz32 clz32_riscv32
#define clz64 clz64_riscv32
#define cmp_flatrange_addr cmp_flatrange_addr_riscv32
#define code_gen_alloc code_gen_alloc_riscv32
#define commonNaNToFloat128 commonNaNToFloat128_riscv32
#define commonNaNToFloat16 commonNaNToFloat16_riscv32
#define commonNaNToFloat32 commonNaNToFloat32_riscv32
#define commonNaNToFloat64 commonNaNToFloat64_riscv32
#define commonNaNToFloatx80 commonNaNToFloatx80_riscv32
#define compute_abs_deadline compute_abs_deadline_riscv32
#define cond_name cond_name_riscv32
#define configure_accelerator configure_accelerator_riscv32
#define container_get container_get_riscv32
#define container_info container_info_riscv32
#define container_register_types container_register_types_riscv32
#define contextidr_write contextidr_write_riscv32
#define core_log_global_start core_log_global_start_riscv32
#define core_log_global_stop core_log_global_stop_riscv32
#define core_memory_listener core_memory_listener_riscv32
#define cortex_a15_initfn cortex_a15_initfn_riscv32
#define cortex_a8_initfn cortex_a8_initfn_riscv32
#define cortex_a9_initfn cortex_a9_initfn_riscv32
#define cortex_m3_initfn cortex_m3_initfn_riscv32
#define cortexa15_cp_reginfo cortexa15_cp_reginfo_riscv32
#define cortexa8_cp_reginfo cortexa8_cp_reginfo_riscv32
#define cortexa9_cp_reginfo cortexa9_cp_reginfo_riscv32
#define countLeadingZeros32 countLeadingZeros32_riscv32
#define countLeadingZeros64 countLeadingZeros64_riscv32
#define count_cpreg count_cpreg_riscv32
#define cp_access_ok cp_access_ok_riscv32
#define cp_reg_reset cp_reg_reset_riscv32
#define cp_reginfo cp_reginfo_riscv32
#define cpacr_write cpacr_write_riscv32
#define cpreg_field_is_64bit cpreg_field_is_64bit_riscv32
#define cpreg_key_compare cpreg_key_compare_riscv32
#define cpreg_make_keylist cpreg_make_keylist_riscv32
#define cpreg_to_kvm_id cpreg_to_kvm_id_riscv32
#define cpsr_read cpsr_read_riscv32
#define cpsr_write cpsr_write_riscv32
#define cptype_valid cptype_valid_riscv32
#define cpu_abort cpu_abort_riscv32
#define cpu_address_space_init cpu_address_space_init_riscv32
#define cpu_breakpoint_insert cpu_breakpoint_insert_riscv32
#define cpu_breakpoint_remove cpu_breakpoint_remove_riscv32
#define cpu_breakpoint_remove_all cpu_breakpoint_remove_all_riscv32
#define cpu_breakpoint_remove_by_ref cpu_breakpoint_remove_by_ref_riscv32
#define cpu_can_do_io cpu_can_do_io_riscv32
#define cpu_can_run cpu_can_run_riscv32
#define cpu_class_init cpu_class_init_riscv32
#define cpu_common_class_by_name cpu_common_class_by_name_riscv32
#define cpu_common_exec_interrupt cpu_common_exec_interrupt_riscv32
#define cpu_common_get_arch_id cpu_common_get_arch_id_riscv32
#define cpu_common_get_memory_mapping cpu_common_get_memory_mapping_riscv32
#define cpu_common_get_paging_enabled cpu_common_get_paging_enabled_riscv32
#define cpu_common_has_work cpu_common_has_work_riscv32
#define cpu_common_initfn cpu_common_initfn_riscv32
#define cpu_common_noop cpu_common_noop_riscv32
#define cpu_common_parse_features cpu_common_parse_features_riscv32
#define cpu_common_realizefn cpu_common_realizefn_riscv32
#define cpu_common_reset cpu_common_reset_riscv32
#define cpu_dump_statistics cpu_dump_statistics_riscv32
#define cpu_exec cpu_exec_riscv32
#define cpu_exec_exit cpu_exec_exit_riscv32
#define cpu_exec_init cpu_exec_init_riscv32
#define cpu_exec_init_all cpu_exec_init_all_riscv32
#define cpu_exec_step_atomic cpu_exec_step_atomic_riscv32
#define cpu_flush_icache_range cpu_flush_icache_range_riscv32
#define cpu_gen_init cpu_gen_init_riscv32
#define cpu_get_address_space cpu_get_address_space_riscv32
#define cpu_get_clock cpu_get_clock_riscv32
#define cpu_get_real_ticks cpu_get_real_ticks_riscv32
#define cpu_get_tb_cpu_state cpu_get_tb_cpu_state_riscv32
#define cpu_handle_debug_exception cpu_handle_debug_exception_riscv32
#define cpu_handle_guest_debug cpu_handle_guest_debug_riscv32
#define cpu_inb cpu_inb_riscv32
#define cpu_inl cpu_inl_riscv32
#define cpu_interrupt cpu_interrupt_riscv32
#define cpu_interrupt_handler cpu_interrupt_handler_riscv32
#define cpu_inw cpu_inw_riscv32
#define cpu_io_recompile cpu_io_recompile_riscv32
#define cpu_is_stopped cpu_is_stopped_riscv32
#define cpu_ldl_code cpu_ldl_code_riscv32
#define cpu_ldub_code cpu_ldub_code_riscv32
#define cpu_lduw_code cpu_lduw_code_riscv32
#define cpu_loop_exit cpu_loop_exit_riscv32
#define cpu_loop_exit_atomic cpu_loop_exit_atomic_riscv32
#define cpu_loop_exit_noexc cpu_loop_exit_noexc_riscv32
#define cpu_loop_exit_restore cpu_loop_exit_restore_riscv32
#define cpu_memory_rw_debug cpu_memory_rw_debug_riscv32
#define cpu_outb cpu_outb_riscv32
#define cpu_outl cpu_outl_riscv32
#define cpu_outw cpu_outw_riscv32
#define cpu_physical_memory_all_dirty cpu_physical_memory_all_dirty_riscv32
#define cpu_physical_memory_clear_dirty_range cpu_physical_memory_clear_dirty_range_riscv32
#define cpu_physical_memory_is_clean cpu_physical_memory_is_clean_riscv32
#define cpu_physical_memory_is_io cpu_physical_memory_is_io_riscv32
#define cpu_physical_memory_map cpu_physical_memory_map_riscv32
#define cpu_physical_memory_range_includes_clean cpu_physical_memory_range_includes_clean_riscv32
#define cpu_physical_memory_reset_dirty cpu_physical_memory_reset_dirty_riscv32
#define cpu_physical_memory_rw cpu_physical_memory_rw_riscv32
#define cpu_physical_memory_unmap cpu_physical_memory_unmap_riscv32
#define cpu_physical_memory_write_rom cpu_physical_memory_write_rom_riscv32
#define cpu_physical_memory_write_rom_internal cpu_physical_memory_write_rom_internal_riscv32
#define cpu_register cpu_register_riscv32
#define cpu_register_types cpu_register_types_riscv32
#define cpu_restore_state cpu_restore_state_riscv32
#define cpu_restore_state_from_tb cpu_restore_state_from_tb_riscv32
#define cpu_single_step cpu_single_step_riscv32
#define cpu_tb_exec cpu_tb_exec_riscv32
#define cpu_to_be64 cpu_to_be64_riscv32
#define cpu_to_le32 cpu_to_le32_riscv32
#define cpu_to_le64 cpu_to_le64_riscv32
#define cpu_type_info cpu_type_info_riscv32
#define cpu_unassigned_access cpu_unassigned_access_riscv32
#define cpu_watchpoint_address_matches cpu_watchpoint_address_matches_riscv32
#define cpu_watchpoint_insert cpu_watchpoint_insert_riscv32
#define cpu_watchpoint_remove cpu_watchpoint_remove_riscv32
#define cpu_watchpoint_remove_all cpu_watchpoint_remove_all_riscv32
#define cpu_watchpoint_remove_by_ref cpu_watchpoint_remove_by_ref_riscv32
#define crc32c_table crc32c_table_riscv32
#define create_new_memory_mapping create_new_memory_mapping_riscv32
#define csselr_write csselr_write_riscv32
#define cto32 cto32_riscv32
#define ctr_el0_access ctr_el0_access_riscv32
#define ctz32 ctz32_riscv32
#define ctz64 ctz64_riscv32
#define dacr_write dacr_write_riscv32
#define dbgbcr_write dbgbcr_write_riscv32
#define dbgbvr_write dbgbvr_write_riscv32
#define dbgwcr_write dbgwcr_write_riscv32
#define dbgwvr_write dbgwvr_write_riscv32
#define debug_cp_reginfo debug_cp_reginfo_riscv32
#define debug_frame debug_frame_riscv32
#define debug_lpae_cp_reginfo debug_lpae_cp_reginfo_riscv32
#define define_arm_cp_regs define_arm_cp_regs_riscv32
#define define_arm_cp_regs_with_opaque define_arm_cp_regs_with_opaque_riscv32
#define define_debug_regs define_debug_regs_riscv32
#define define_one_arm_cp_reg define_one_arm_cp_reg_riscv32
#define define_one_arm_cp_reg_with_opaque define_one_arm_cp_reg_with_opaque_riscv32
#define deregister_tm_clones deregister_tm_clones_riscv32
#define device_class_base_init device_class_base_init_riscv32
#define device_class_init device_class_init_riscv32
#define device_finalize device_finalize_riscv32
#define device_get_realized device_get_realized_riscv32
#define device_initfn device_initfn_riscv32
#define device_post_init device_post_init_riscv32
#define device_reset device_reset_riscv32
#define device_set_realized device_set_realized_riscv32
#define device_type_info device_type_info_riscv32
#define disas_arm_insn disas_arm_insn_riscv32
#define disas_coproc_insn disas_coproc_insn_riscv32
#define disas_dsp_insn disas_dsp_insn_riscv32
#define disas_iwmmxt_insn disas_iwmmxt_insn_riscv32
#define disas_neon_data_insn disas_neon_data_insn_riscv32
#define disas_neon_ls_insn disas_neon_ls_insn_riscv32
#define disas_thumb2_insn disas_thumb2_insn_riscv32
#define disas_thumb_insn disas_thumb_insn_riscv32
#define disas_vfp_insn disas_vfp_insn_riscv32
#define disas_vfp_v8_insn disas_vfp_v8_insn_riscv32
#define do_arm_semihosting do_arm_semihosting_riscv32
#define do_clz16 do_clz16_riscv32
#define do_clz8 do_clz8_riscv32
#define do_constant_folding do_constant_folding_riscv32
#define do_constant_folding_2 do_constant_folding_2_riscv32
#define do_constant_folding_cond do_constant_folding_cond_riscv32
#define do_constant_folding_cond2 do_constant_folding_cond2_riscv32
#define do_constant_folding_cond_32 do_constant_folding_cond_32_riscv32
#define do_constant_folding_cond_64 do_constant_folding_cond_64_riscv32
#define do_constant_folding_cond_eq do_constant_folding_cond_eq_riscv32
#define do_fcvt_f16_to_f32 do_fcvt_f16_to_f32_riscv32
#define do_fcvt_f32_to_f16 do_fcvt_f32_to_f16_riscv32
#define do_ssat do_ssat_riscv32
#define do_usad do_usad_riscv32
#define do_usat do_usat_riscv32
#define do_v7m_exception_exit do_v7m_exception_exit_riscv32
#define dummy_c15_cp_reginfo dummy_c15_cp_reginfo_riscv32
#define dummy_func dummy_func_riscv32
#define dummy_section dummy_section_riscv32
#define dup_const_impl dup_const_impl_riscv32
#define end_list end_list_riscv32
#define ensure_writable_pages ensure_writable_pages_riscv32
#define eq128 eq128_riscv32
#define error_copy error_copy_riscv32
#define error_exit error_exit_riscv32
#define error_get_class error_get_class_riscv32
#define error_get_pretty error_get_pretty_riscv32
#define error_setg_file_open_internal error_setg_file_open_internal_riscv32
#define estimateDiv128To64 estimateDiv128To64_riscv32
#define estimateSqrt32 estimateSqrt32_riscv32
#define excnames excnames_riscv32
#define excp_is_internal excp_is_internal_riscv32
#define extended_addresses_enabled extended_addresses_enabled_riscv32
#define extended_mpu_ap_bits extended_mpu_ap_bits_riscv32
#define extract32 extract32_riscv32
#define extract64 extract64_riscv32
#define extractFloat128Exp extractFloat128Exp_riscv32
#define extractFloat128Frac0 extractFloat128Frac0_riscv32
#define extractFloat128Frac1 extractFloat128Frac1_riscv32
#define extractFloat128Sign extractFloat128Sign_riscv32
#define extractFloat16Exp extractFloat16Exp_riscv32
#define extractFloat16Frac extractFloat16Frac_riscv32
#define extractFloat16Sign extractFloat16Sign_riscv32
#define extractFloat32Exp extractFloat32Exp_riscv32
#define extractFloat32Frac extractFloat32Frac_riscv32
#define extractFloat32Sign extractFloat32Sign_riscv32
#define extractFloat64Exp extractFloat64Exp_riscv32
#define extractFloat64Frac extractFloat64Frac_riscv32
#define extractFloat64Sign extractFloat64Sign_riscv32
#define extractFloatx80Exp extractFloatx80Exp_riscv32
#define extractFloatx80Frac extractFloatx80Frac_riscv32
#define extractFloatx80Sign extractFloatx80Sign_riscv32
#define fcse_write fcse_write_riscv32
#define find_better_copy find_better_copy_riscv32
#define find_default_machine find_default_machine_riscv32
#define find_desc_by_name find_desc_by_name_riscv32
#define find_first_bit find_first_bit_riscv32
#define find_paging_enabled_cpu find_paging_enabled_cpu_riscv32
#define find_ram_block find_ram_block_riscv32
#define find_ram_offset find_ram_offset_riscv32
#define find_string find_string_riscv32
#define find_type find_type_riscv32
#define flatrange_equal flatrange_equal_riscv32
#define flatview_add_to_dispatch flatview_add_to_dispatch_riscv32
#define flatview_destroy flatview_destroy_riscv32
#define flatview_init flatview_init_riscv32
#define flatview_insert flatview_insert_riscv32
#define flatview_lookup flatview_lookup_riscv32
#define flatview_read flatview_read_riscv32
#define flatview_read_continue flatview_read_continue_riscv32
#define flatview_read_full flatview_read_full_riscv32
#define flatview_ref flatview_ref_riscv32
#define flatview_simplify flatview_simplify_riscv32
#define flatview_to_dispatch flatview_to_dispatch_riscv32
#define flatview_translate flatview_translate_riscv32
#define flatview_unref flatview_unref_riscv32
#define float128ToCommonNaN float128ToCommonNaN_riscv32
#define float128_add float128_add_riscv32
#define float128_compare float128_compare_riscv32
#define float128_compare_internal float128_compare_internal_riscv32
#define float128_compare_quiet float128_compare_quiet_riscv32
#define float128_default_nan float128_default_nan_riscv32
#define float128_div float128_div_riscv32
#define float128_eq float128_eq_riscv32
#define float128_eq_quiet float128_eq_quiet_riscv32
#define float128_is_quiet_nan float128_is_quiet_nan_riscv32
#define float128_is_signaling_nan float128_is_signaling_nan_riscv32
#define float128_le float128_le_riscv32
#define float128_le_quiet float128_le_quiet_riscv32
#define float128_lt float128_lt_riscv32
#define float128_lt_quiet float128_lt_quiet_riscv32
#define float128_mul float128_mul_riscv32
#define float128_rem float128_rem_riscv32
#define float128_round_to_int float128_round_to_int_riscv32
#define float128_scalbn float128_scalbn_riscv32
#define float128_silence_nan float128_silence_nan_riscv32
#define float128_sqrt float128_sqrt_riscv32
#define float128_sub float128_sub_riscv32
#define float128_to_float32 float128_to_float32_riscv32
#define float128_to_float64 float128_to_float64_riscv32
#define float128_to_floatx80 float128_to_floatx80_riscv32
#define float128_to_int32 float128_to_int32_riscv32
#define float128_to_int32_round_to_zero float128_to_int32_round_to_zero_riscv32
#define float128_to_int64 float128_to_int64_riscv32
#define float128_to_int64_round_to_zero float128_to_int64_round_to_zero_riscv32
#define float128_to_uint32 float128_to_uint32_riscv32
#define float128_to_uint32_round_to_zero float128_to_uint32_round_to_zero_riscv32
#define float128_to_uint64 float128_to_uint64_riscv32
#define float128_to_uint64_round_to_zero float128_to_uint64_round_to_zero_riscv32
#define float128_unordered float128_unordered_riscv32
#define float128_unordered_quiet float128_unordered_quiet_riscv32
#define float16ToCommonNaN float16ToCommonNaN_riscv32
#define float16_add float16_add_riscv32
#define float16_compare float16_compare_riscv32
#define float16_compare_quiet float16_compare_quiet_riscv32
#define float16_default_nan float16_default_nan_riscv32
#define float16_div float16_div_riscv32
#define float16_is_quiet_nan float16_is_quiet_nan_riscv32
#define float16_is_signaling_nan float16_is_signaling_nan_riscv32
#define float16_max float16_max_riscv32
#define float16_maxnum float16_maxnum_riscv32
#define float16_maxnummag float16_maxnummag_riscv32
#define float16_min float16_min_riscv32
#define float16_minnum float16_minnum_riscv32
#define float16_minnummag float16_minnummag_riscv32
#define float16_mul float16_mul_riscv32
#define float16_muladd float16_muladd_riscv32
#define float16_round_to_int float16_round_to_int_riscv32
#define float16_scalbn float16_scalbn_riscv32
#define float16_silence_nan float16_silence_nan_riscv32
#define float16_sqrt float16_sqrt_riscv32
#define float16_squash_input_denormal float16_squash_input_denormal_riscv32
#define float16_sub float16_sub_riscv32
#define float16_to_int16 float16_to_int16_riscv32
#define float16_to_int16_round_to_zero float16_to_int16_round_to_zero_riscv32
#define float16_to_int16_scalbn float16_to_int16_scalbn_riscv32
#define float16_to_int32 float16_to_int32_riscv32
#define float16_to_int32_round_to_zero float16_to_int32_round_to_zero_riscv32
#define float16_to_int32_scalbn float16_to_int32_scalbn_riscv32
#define float16_to_int64 float16_to_int64_riscv32
#define float16_to_int64_round_to_zero float16_to_int64_round_to_zero_riscv32
#define float16_to_int64_scalbn float16_to_int64_scalbn_riscv32
#define float16_to_float32 float16_to_float32_riscv32
#define float16_to_float64 float16_to_float64_riscv32
#define float16_to_uint16 float16_to_uint16_riscv32
#define float16_to_uint16_round_to_zero float16_to_uint16_round_to_zero_riscv32
#define float16_to_uint16_scalbn float16_to_uint16_scalbn_riscv32
#define float16_to_uint32 float16_to_uint32_riscv32
#define float16_to_uint32_round_to_zero float16_to_uint32_round_to_zero_riscv32
#define float16_to_uint32_scalbn float16_to_uint32_scalbn_riscv32
#define float16_to_uint64 float16_to_uint64_riscv32
#define float16_to_uint64_round_to_zero float16_to_uint64_round_to_zero_riscv32
#define float16_to_uint64_scalbn float16_to_uint64_scalbn_riscv32
#define float32ToCommonNaN float32ToCommonNaN_riscv32
#define float32_abs float32_abs_riscv32
#define float32_add float32_add_riscv32
#define float32_chs float32_chs_riscv32
#define float32_compare float32_compare_riscv32
#define float32_compare_internal float32_compare_internal_riscv32
#define float32_compare_quiet float32_compare_quiet_riscv32
#define float32_default_nan float32_default_nan_riscv32
#define float32_div float32_div_riscv32
#define float32_eq float32_eq_riscv32
#define float32_eq_quiet float32_eq_quiet_riscv32
#define float32_exp2 float32_exp2_riscv32
#define float32_exp2_coefficients float32_exp2_coefficients_riscv32
#define float32_is_any_nan float32_is_any_nan_riscv32
#define float32_is_infinity float32_is_infinity_riscv32
#define float32_is_neg float32_is_neg_riscv32
#define float32_is_quiet_nan float32_is_quiet_nan_riscv32
#define float32_is_signaling_nan float32_is_signaling_nan_riscv32
#define float32_is_zero float32_is_zero_riscv32
#define float32_is_zero_or_denormal float32_is_zero_or_denormal_riscv32
#define float32_le float32_le_riscv32
#define float32_le_quiet float32_le_quiet_riscv32
#define float32_log2 float32_log2_riscv32
#define float32_lt float32_lt_riscv32
#define float32_lt_quiet float32_lt_quiet_riscv32
#define float32_max float32_max_riscv32
#define float32_maxnum float32_maxnum_riscv32
#define float32_maxnummag float32_maxnummag_riscv32
#define float32_min float32_min_riscv32
#define float32_minmax float32_minmax_riscv32
#define float32_minnum float32_minnum_riscv32
#define float32_minnummag float32_minnummag_riscv32
#define float32_mul float32_mul_riscv32
#define float32_muladd float32_muladd_riscv32
#define float32_rem float32_rem_riscv32
#define float32_round_to_int float32_round_to_int_riscv32
#define float32_scalbn float32_scalbn_riscv32
#define float32_set_sign float32_set_sign_riscv32
#define float32_silence_nan float32_silence_nan_riscv32
#define float32_sqrt float32_sqrt_riscv32
#define float32_squash_input_denormal float32_squash_input_denormal_riscv32
#define float32_sub float32_sub_riscv32
#define float32_to_float128 float32_to_float128_riscv32
#define float32_to_float16 float32_to_float16_riscv32
#define float32_to_float64 float32_to_float64_riscv32
#define float32_to_floatx80 float32_to_floatx80_riscv32
#define float32_to_int16 float32_to_int16_riscv32
#define float32_to_int16_round_to_zero float32_to_int16_round_to_zero_riscv32
#define float32_to_int16_scalbn float32_to_int16_scalbn_riscv32
#define float32_to_int32 float32_to_int32_riscv32
#define float32_to_int32_round_to_zero float32_to_int32_round_to_zero_riscv32
#define float32_to_int32_scalbn float32_to_int32_scalbn_riscv32
#define float32_to_int64 float32_to_int64_riscv32
#define float32_to_int64_round_to_zero float32_to_int64_round_to_zero_riscv32
#define float32_to_int64_scalbn float32_to_int64_scalbn_riscv32
#define float32_to_uint16 float32_to_uint16_riscv32
#define float32_to_uint16_round_to_zero float32_to_uint16_round_to_zero_riscv32
#define float32_to_uint16_scalbn float32_to_uint16_scalbn_riscv32
#define float32_to_uint32 float32_to_uint32_riscv32
#define float32_to_uint32_round_to_zero float32_to_uint32_round_to_zero_riscv32
#define float32_to_uint32_scalbn float32_to_uint32_scalbn_riscv32
#define float32_to_uint64 float32_to_uint64_riscv32
#define float32_to_uint64_round_to_zero float32_to_uint64_round_to_zero_riscv32
#define float32_to_uint64_scalbn float32_to_uint64_scalbn_riscv32
#define float32_unordered float32_unordered_riscv32
#define float32_unordered_quiet float32_unordered_quiet_riscv32
#define float64ToCommonNaN float64ToCommonNaN_riscv32
#define float64_abs float64_abs_riscv32
#define float64_add float64_add_riscv32
#define float64_chs float64_chs_riscv32
#define float64_compare float64_compare_riscv32
#define float64_compare_internal float64_compare_internal_riscv32
#define float64_compare_quiet float64_compare_quiet_riscv32
#define float64_default_nan float64_default_nan_riscv32
#define float64_div float64_div_riscv32
#define float64_eq float64_eq_riscv32
#define float64_eq_quiet float64_eq_quiet_riscv32
#define float64_is_any_nan float64_is_any_nan_riscv32
#define float64_is_infinity float64_is_infinity_riscv32
#define float64_is_neg float64_is_neg_riscv32
#define float64_is_quiet_nan float64_is_quiet_nan_riscv32
#define float64_is_signaling_nan float64_is_signaling_nan_riscv32
#define float64_is_zero float64_is_zero_riscv32
#define float64_le float64_le_riscv32
#define float64_le_quiet float64_le_quiet_riscv32
#define float64_log2 float64_log2_riscv32
#define float64_lt float64_lt_riscv32
#define float64_lt_quiet float64_lt_quiet_riscv32
#define float64_max float64_max_riscv32
#define float64_maxnum float64_maxnum_riscv32
#define float64_maxnummag float64_maxnummag_riscv32
#define float64_min float64_min_riscv32
#define float64_minmax float64_minmax_riscv32
#define float64_minnum float64_minnum_riscv32
#define float64_minnummag float64_minnummag_riscv32
#define float64_mul float64_mul_riscv32
#define float64_muladd float64_muladd_riscv32
#define float64_rem float64_rem_riscv32
#define float64_round_to_int float64_round_to_int_riscv32
#define float64_scalbn float64_scalbn_riscv32
#define float64_set_sign float64_set_sign_riscv32
#define float64_silence_nan float64_silence_nan_riscv32
#define float64_sqrt float64_sqrt_riscv32
#define float64_squash_input_denormal float64_squash_input_denormal_riscv32
#define float64_sub float64_sub_riscv32
#define float64_to_float128 float64_to_float128_riscv32
#define float64_to_float16 float64_to_float16_riscv32
#define float64_to_float32 float64_to_float32_riscv32
#define float64_to_floatx80 float64_to_floatx80_riscv32
#define float64_to_int16 float64_to_int16_riscv32
#define float64_to_int16_round_to_zero float64_to_int16_round_to_zero_riscv32
#define float64_to_int16_scalbn float64_to_int16_scalbn_riscv32
#define float64_to_int32 float64_to_int32_riscv32
#define float64_to_int32_round_to_zero float64_to_int32_round_to_zero_riscv32
#define float64_to_int32_scalbn float64_to_int32_scalbn_riscv32
#define float64_to_int64 float64_to_int64_riscv32
#define float64_to_int64_round_to_zero float64_to_int64_round_to_zero_riscv32
#define float64_to_int64_scalbn float64_to_int64_scalbn_riscv32
#define float64_to_uint16 float64_to_uint16_riscv32
#define float64_to_uint16_round_to_zero float64_to_uint16_round_to_zero_riscv32
#define float64_to_uint16_scalbn float64_to_uint16_scalbn_riscv32
#define float64_to_uint32 float64_to_uint32_riscv32
#define float64_to_uint32_round_to_zero float64_to_uint32_round_to_zero_riscv32
#define float64_to_uint32_scalbn float64_to_uint32_scalbn_riscv32
#define float64_to_uint64 float64_to_uint64_riscv32
#define float64_to_uint64_round_to_zero float64_to_uint64_round_to_zero_riscv32
#define float64_to_uint64_scalbn float64_to_uint64_scalbn_riscv32
#define float64_unordered float64_unordered_riscv32
#define float64_unordered_quiet float64_unordered_quiet_riscv32
#define float_raise float_raise_riscv32
#define floatx80ToCommonNaN floatx80ToCommonNaN_riscv32
#define floatx80_add floatx80_add_riscv32
#define floatx80_compare floatx80_compare_riscv32
#define floatx80_compare_internal floatx80_compare_internal_riscv32
#define floatx80_compare_quiet floatx80_compare_quiet_riscv32
#define floatx80_default_nan floatx80_default_nan_riscv32
#define floatx80_div floatx80_div_riscv32
#define floatx80_eq floatx80_eq_riscv32
#define floatx80_eq_quiet floatx80_eq_quiet_riscv32
#define floatx80_infinity floatx80_infinity_riscv32
#define floatx80_is_quiet_nan floatx80_is_quiet_nan_riscv32
#define floatx80_is_signaling_nan floatx80_is_signaling_nan_riscv32
#define floatx80_le floatx80_le_riscv32
#define floatx80_le_quiet floatx80_le_quiet_riscv32
#define floatx80_lt floatx80_lt_riscv32
#define floatx80_lt_quiet floatx80_lt_quiet_riscv32
#define floatx80_mul floatx80_mul_riscv32
#define floatx80_rem floatx80_rem_riscv32
#define floatx80_round floatx80_round_riscv32
#define floatx80_round_to_int floatx80_round_to_int_riscv32
#define floatx80_scalbn floatx80_scalbn_riscv32
#define floatx80_silence_nan floatx80_silence_nan_riscv32
#define floatx80_sqrt floatx80_sqrt_riscv32
#define floatx80_sub floatx80_sub_riscv32
#define floatx80_to_float128 floatx80_to_float128_riscv32
#define floatx80_to_float32 floatx80_to_float32_riscv32
#define floatx80_to_float64 floatx80_to_float64_riscv32
#define floatx80_to_int32 floatx80_to_int32_riscv32
#define floatx80_to_int32_round_to_zero floatx80_to_int32_round_to_zero_riscv32
#define floatx80_to_int64 floatx80_to_int64_riscv32
#define floatx80_to_int64_round_to_zero floatx80_to_int64_round_to_zero_riscv32
#define floatx80_unordered floatx80_unordered_riscv32
#define floatx80_unordered_quiet floatx80_unordered_quiet_riscv32
#define flush_icache_range flush_icache_range_riscv32
#define format_string format_string_riscv32
#define fp_decode_rm fp_decode_rm_riscv32
#define frame_dummy frame_dummy_riscv32
#define free_code_gen_buffer free_code_gen_buffer_riscv32
#define free_range free_range_riscv32
#define fstat64 fstat64_riscv32
#define futex_wait futex_wait_riscv32
#define futex_wake futex_wake_riscv32
#define g_list_insert_sorted_merged g_list_insert_sorted_merged_riscv32
#define gen_goto_tb gen_goto_tb_riscv32
#define gen_helper_access_check_cp_reg gen_helper_access_check_cp_reg_riscv32
#define gen_helper_check_breakpoints gen_helper_check_breakpoints_riscv32
#define gen_helper_clear_pstate_ss gen_helper_clear_pstate_ss_riscv32
#define gen_helper_cpsr_read gen_helper_cpsr_read_riscv32
#define gen_helper_cpsr_write gen_helper_cpsr_write_riscv32
#define gen_helper_cpsr_write_eret gen_helper_cpsr_write_eret_riscv32
#define gen_helper_get_cp_reg gen_helper_get_cp_reg_riscv32
#define gen_helper_get_cp_reg64 gen_helper_get_cp_reg64_riscv32
#define gen_helper_get_r13_banked gen_helper_get_r13_banked_riscv32
#define gen_helper_get_user_reg gen_helper_get_user_reg_riscv32
#define gen_helper_sel_flags gen_helper_sel_flags_riscv32
#define gen_helper_set_cp_reg gen_helper_set_cp_reg_riscv32
#define gen_helper_set_cp_reg64 gen_helper_set_cp_reg64_riscv32
#define gen_helper_set_neon_rmode gen_helper_set_neon_rmode_riscv32
#define gen_helper_set_r13_banked gen_helper_set_r13_banked_riscv32
#define gen_helper_set_rmode gen_helper_set_rmode_riscv32
#define gen_helper_set_user_reg gen_helper_set_user_reg_riscv32
#define gen_helper_vfp_get_fpscr gen_helper_vfp_get_fpscr_riscv32
#define gen_helper_vfp_set_fpscr gen_helper_vfp_set_fpscr_riscv32
#define gen_intermediate_code gen_intermediate_code_riscv32
#define gen_lookup_tb gen_lookup_tb_riscv32
#define gen_new_label gen_new_label_riscv32
#define gen_set_label gen_set_label_riscv32
#define gen_step_complete_exception gen_step_complete_exception_riscv32
#define generate_memory_topology generate_memory_topology_riscv32
#define generic_timer_cp_reginfo generic_timer_cp_reginfo_riscv32
#define get_arm_cp_reginfo get_arm_cp_reginfo_riscv32
#define get_clock get_clock_riscv32
#define get_clock_realtime get_clock_realtime_riscv32
#define get_constraint_priority get_constraint_priority_riscv32
#define get_float_exception_flags get_float_exception_flags_riscv32
#define get_float_rounding_mode get_float_rounding_mode_riscv32
#define get_fpstatus_ptr get_fpstatus_ptr_riscv32
#define get_level1_table_address get_level1_table_address_riscv32
#define get_mem_index get_mem_index_riscv32
#define get_next_param_value get_next_param_value_riscv32
#define get_opt_name get_opt_name_riscv32
#define get_opt_value get_opt_value_riscv32
#define get_page_addr_code get_page_addr_code_riscv32
#define get_param_value get_param_value_riscv32
#define get_phys_addr get_phys_addr_riscv32
#define get_phys_addr_lpae get_phys_addr_lpae_riscv32
#define get_phys_addr_mpu get_phys_addr_mpu_riscv32
#define get_phys_addr_v5 get_phys_addr_v5_riscv32
#define get_phys_addr_v6 get_phys_addr_v6_riscv32
#define get_system_memory get_system_memory_riscv32
#define gt_cnt_read gt_cnt_read_riscv32
#define gt_cnt_reset gt_cnt_reset_riscv32
#define gt_cntfrq_access gt_cntfrq_access_riscv32
#define gt_counter_access gt_counter_access_riscv32
#define gt_ctl_write gt_ctl_write_riscv32
#define gt_cval_write gt_cval_write_riscv32
#define gt_get_countervalue gt_get_countervalue_riscv32
#define gt_pct_access gt_pct_access_riscv32
#define gt_ptimer_access gt_ptimer_access_riscv32
#define gt_recalc_timer gt_recalc_timer_riscv32
#define gt_timer_access gt_timer_access_riscv32
#define gt_tval_read gt_tval_read_riscv32
#define gt_tval_write gt_tval_write_riscv32
#define gt_vct_access gt_vct_access_riscv32
#define gt_vtimer_access gt_vtimer_access_riscv32
#define guest_phys_blocks_free guest_phys_blocks_free_riscv32
#define guest_phys_blocks_init guest_phys_blocks_init_riscv32
#define handle_vcvt handle_vcvt_riscv32
#define handle_vminmaxnm handle_vminmaxnm_riscv32
#define handle_vrint handle_vrint_riscv32
#define handle_vsel handle_vsel_riscv32
#define has_help_option has_help_option_riscv32
#define have_avx1 have_avx1_riscv32
#define have_avx2 have_avx2_riscv32
#define have_bmi1 have_bmi1_riscv32
#define have_bmi2 have_bmi2_riscv32
#define have_popcnt have_popcnt_riscv32
#define hcr_write hcr_write_riscv32
#define helper_access_check_cp_reg helper_access_check_cp_reg_riscv32
#define helper_add_saturate helper_add_saturate_riscv32
#define helper_add_setq helper_add_setq_riscv32
#define helper_add_usaturate helper_add_usaturate_riscv32
#define helper_atomic_add_fetchb helper_atomic_add_fetchb_riscv32
#define helper_atomic_add_fetchb_mmu helper_atomic_add_fetchb_mmu_riscv32
#define helper_atomic_add_fetchl_be helper_atomic_add_fetchl_be_riscv32
#define helper_atomic_add_fetchl_be_mmu helper_atomic_add_fetchl_be_mmu_riscv32
#define helper_atomic_add_fetchl_le helper_atomic_add_fetchl_le_riscv32
#define helper_atomic_add_fetchl_le_mmu helper_atomic_add_fetchl_le_mmu_riscv32
#define helper_atomic_add_fetchq_be helper_atomic_add_fetchq_be_riscv32
#define helper_atomic_add_fetchq_be_mmu helper_atomic_add_fetchq_be_mmu_riscv32
#define helper_atomic_add_fetchq_le helper_atomic_add_fetchq_le_riscv32
#define helper_atomic_add_fetchq_le_mmu helper_atomic_add_fetchq_le_mmu_riscv32
#define helper_atomic_add_fetchw_be helper_atomic_add_fetchw_be_riscv32
#define helper_atomic_add_fetchw_be_mmu helper_atomic_add_fetchw_be_mmu_riscv32
#define helper_atomic_add_fetchw_le helper_atomic_add_fetchw_le_riscv32
#define helper_atomic_add_fetchw_le_mmu helper_atomic_add_fetchw_le_mmu_riscv32
#define helper_atomic_and_fetchb helper_atomic_and_fetchb_riscv32
#define helper_atomic_and_fetchb_le_mmu helper_atomic_and_fetchb_le_mmu_riscv32
#define helper_atomic_and_fetchb_mmu helper_atomic_and_fetchb_mmu_riscv32
#define helper_atomic_and_fetchl_be helper_atomic_and_fetchl_be_riscv32
#define helper_atomic_and_fetchl_be_mmu helper_atomic_and_fetchl_be_mmu_riscv32
#define helper_atomic_and_fetchl_le helper_atomic_and_fetchl_le_riscv32
#define helper_atomic_and_fetchl_le_mmu helper_atomic_and_fetchl_le_mmu_riscv32
#define helper_atomic_and_fetchq_be helper_atomic_and_fetchq_be_riscv32
#define helper_atomic_and_fetchq_be_mmu helper_atomic_and_fetchq_be_mmu_riscv32
#define helper_atomic_and_fetchq_le helper_atomic_and_fetchq_le_riscv32
#define helper_atomic_and_fetchq_le_mmu helper_atomic_and_fetchq_le_mmu_riscv32
#define helper_atomic_and_fetchw_be helper_atomic_and_fetchw_be_riscv32
#define helper_atomic_and_fetchw_be_mmu helper_atomic_and_fetchw_be_mmu_riscv32
#define helper_atomic_and_fetchw_le helper_atomic_and_fetchw_le_riscv32
#define helper_atomic_and_fetchw_le_mmu helper_atomic_and_fetchw_le_mmu_riscv32
#define helper_atomic_cmpxchgb helper_atomic_cmpxchgb_riscv32
#define helper_atomic_cmpxchgb helper_atomic_cmpxchgb_riscv32
#define helper_atomic_cmpxchgb_mmu helper_atomic_cmpxchgb_mmu_riscv32
#define helper_atomic_cmpxchgl_be helper_atomic_cmpxchgl_be_riscv32
#define helper_atomic_cmpxchgl_be_mmu helper_atomic_cmpxchgl_be_mmu_riscv32
#define helper_atomic_cmpxchgl_le helper_atomic_cmpxchgl_le_riscv32
#define helper_atomic_cmpxchgl_le_mmu helper_atomic_cmpxchgl_le_mmu_riscv32
#define helper_atomic_cmpxchgo_be helper_atomic_cmpxchgo_be_riscv32
#define helper_atomic_cmpxchgo_be_mmu helper_atomic_cmpxchgo_be_mmu_riscv32
#define helper_atomic_cmpxchgo_le helper_atomic_cmpxchgo_le_riscv32
#define helper_atomic_cmpxchgo_le_mmu helper_atomic_cmpxchgo_le_mmu_riscv32
#define helper_atomic_cmpxchgq_be helper_atomic_cmpxchgq_be_riscv32
#define helper_atomic_cmpxchgq_be_mmu helper_atomic_cmpxchgq_be_mmu_riscv32
#define helper_atomic_cmpxchgq_le helper_atomic_cmpxchgq_le_riscv32
#define helper_atomic_cmpxchgq_le_mmu helper_atomic_cmpxchgq_le_mmu_riscv32
#define helper_atomic_cmpxchgw_be helper_atomic_cmpxchgw_be_riscv32
#define helper_atomic_cmpxchgw_be_mmu helper_atomic_cmpxchgw_be_mmu_riscv32
#define helper_atomic_cmpxchgw_le helper_atomic_cmpxchgw_le_riscv32
#define helper_atomic_cmpxchgw_le_mmu helper_atomic_cmpxchgw_le_mmu_riscv32
#define helper_atomic_fetch_addb helper_atomic_fetch_addb_riscv32
#define helper_atomic_fetch_addb_mmu helper_atomic_fetch_addb_mmu_riscv32
#define helper_atomic_fetch_addl_be helper_atomic_fetch_addl_be_riscv32
#define helper_atomic_fetch_addl_be_mmu helper_atomic_fetch_addl_be_mmu_riscv32
#define helper_atomic_fetch_addl_le helper_atomic_fetch_addl_le_riscv32
#define helper_atomic_fetch_addl_le_mmu helper_atomic_fetch_addl_le_mmu_riscv32
#define helper_atomic_fetch_addq_be helper_atomic_fetch_addq_be_riscv32
#define helper_atomic_fetch_addq_be_mmu helper_atomic_fetch_addq_be_mmu_riscv32
#define helper_atomic_fetch_addq_le helper_atomic_fetch_addq_le_riscv32
#define helper_atomic_fetch_addq_le_mmu helper_atomic_fetch_addq_le_mmu_riscv32
#define helper_atomic_fetch_addw_be helper_atomic_fetch_addw_be_riscv32
#define helper_atomic_fetch_addw_be_mmu helper_atomic_fetch_addw_be_mmu_riscv32
#define helper_atomic_fetch_addw_le helper_atomic_fetch_addw_le_riscv32
#define helper_atomic_fetch_addw_le_mmu helper_atomic_fetch_addw_le_mmu_riscv32
#define helper_atomic_fetch_andb helper_atomic_fetch_andb_riscv32
#define helper_atomic_fetch_andb_mmu helper_atomic_fetch_andb_mmu_riscv32
#define helper_atomic_fetch_andl_be helper_atomic_fetch_andl_be_riscv32
#define helper_atomic_fetch_andl_be_mmu helper_atomic_fetch_andl_be_mmu_riscv32
#define helper_atomic_fetch_andl_le helper_atomic_fetch_andl_le_riscv32
#define helper_atomic_fetch_andl_le_mmu helper_atomic_fetch_andl_le_mmu_riscv32
#define helper_atomic_fetch_andq_be helper_atomic_fetch_andq_be_riscv32
#define helper_atomic_fetch_andq_be_mmu helper_atomic_fetch_andq_be_mmu_riscv32
#define helper_atomic_fetch_andq_le helper_atomic_fetch_andq_le_riscv32
#define helper_atomic_fetch_andq_le_mmu helper_atomic_fetch_andq_le_mmu_riscv32
#define helper_atomic_fetch_andw_be helper_atomic_fetch_andw_be_riscv32
#define helper_atomic_fetch_andw_be_mmu helper_atomic_fetch_andw_be_mmu_riscv32
#define helper_atomic_fetch_andw_le helper_atomic_fetch_andw_le_riscv32
#define helper_atomic_fetch_andw_le_mmu helper_atomic_fetch_andw_le_mmu_riscv32
#define helper_atomic_fetch_orb helper_atomic_fetch_orb_riscv32
#define helper_atomic_fetch_orb_mmu helper_atomic_fetch_orb_mmu_riscv32
#define helper_atomic_fetch_orl_be helper_atomic_fetch_orl_be_riscv32
#define helper_atomic_fetch_orl_be_mmu helper_atomic_fetch_orl_be_mmu_riscv32
#define helper_atomic_fetch_orl_le helper_atomic_fetch_orl_le_riscv32
#define helper_atomic_fetch_orl_le_mmu helper_atomic_fetch_orl_le_mmu_riscv32
#define helper_atomic_fetch_orq_be helper_atomic_fetch_orq_be_riscv32
#define helper_atomic_fetch_orq_be_mmu helper_atomic_fetch_orq_be_mmu_riscv32
#define helper_atomic_fetch_orq_le helper_atomic_fetch_orq_le_riscv32
#define helper_atomic_fetch_orq_le_mmu helper_atomic_fetch_orq_le_mmu_riscv32
#define helper_atomic_fetch_orw_be helper_atomic_fetch_orw_be_riscv32
#define helper_atomic_fetch_orw_be_mmu helper_atomic_fetch_orw_be_mmu_riscv32
#define helper_atomic_fetch_orw_le helper_atomic_fetch_orw_le_riscv32
#define helper_atomic_fetch_orw_le_mmu helper_atomic_fetch_orw_le_mmu_riscv32
#define helper_atomic_fetch_smaxb_mmu helper_atomic_fetch_smaxb_mmu_riscv32
#define helper_atomic_fetch_smaxb helper_atomic_fetch_smaxb_riscv32
#define helper_atomic_fetch_smaxl_be_mmu helper_atomic_fetch_smaxl_be_mmu_riscv32
#define helper_atomic_fetch_smaxl_be helper_atomic_fetch_smaxl_be_riscv32
#define helper_atomic_fetch_smaxq_be_mmu helper_atomic_fetch_smaxq_be_mmu_riscv32
#define helper_atomic_fetch_smaxq_be helper_atomic_fetch_smaxq_be_riscv32
#define helper_atomic_fetch_smaxw_be_mmu helper_atomic_fetch_smaxw_be_mmu_riscv32
#define helper_atomic_fetch_smaxw_be helper_atomic_fetch_smaxw_be_riscv32
#define helper_atomic_fetch_sminb_mmu helper_atomic_fetch_sminb_mmu_riscv32
#define helper_atomic_fetch_sminb helper_atomic_fetch_sminb_riscv32
#define helper_atomic_fetch_sminl_be_mmu helper_atomic_fetch_sminl_be_mmu_riscv32
#define helper_atomic_fetch_sminl_be helper_atomic_fetch_sminl_be_riscv32
#define helper_atomic_fetch_sminq_be_mmu helper_atomic_fetch_sminq_be_mmu_riscv32
#define helper_atomic_fetch_sminq_be helper_atomic_fetch_sminq_be_riscv32
#define helper_atomic_fetch_sminw_be_mmu helper_atomic_fetch_sminw_be_mmu_riscv32
#define helper_atomic_fetch_sminw_be helper_atomic_fetch_sminw_be_riscv32
#define helper_atomic_fetch_umaxb_mmu helper_atomic_fetch_umaxb_mmu_riscv32
#define helper_atomic_fetch_umaxb helper_atomic_fetch_umaxb_riscv32
#define helper_atomic_fetch_umaxl_be_mmu helper_atomic_fetch_umaxl_be_mmu_riscv32
#define helper_atomic_fetch_umaxl_be helper_atomic_fetch_umaxl_be_riscv32
#define helper_atomic_fetch_umaxq_be_mmu helper_atomic_fetch_umaxq_be_mmu_riscv32
#define helper_atomic_fetch_umaxq_be helper_atomic_fetch_umaxq_be_riscv32
#define helper_atomic_fetch_umaxw_be_mmu helper_atomic_fetch_umaxw_be_mmu_riscv32
#define helper_atomic_fetch_umaxw_be helper_atomic_fetch_umaxw_be_riscv32
#define helper_atomic_fetch_uminb_mmu helper_atomic_fetch_uminb_mmu_riscv32
#define helper_atomic_fetch_uminb helper_atomic_fetch_uminb_riscv32
#define helper_atomic_fetch_uminl_be_mmu helper_atomic_fetch_uminl_be_mmu_riscv32
#define helper_atomic_fetch_uminl_be helper_atomic_fetch_uminl_be_riscv32
#define helper_atomic_fetch_uminq_be_mmu helper_atomic_fetch_uminq_be_mmu_riscv32
#define helper_atomic_fetch_uminq_be helper_atomic_fetch_uminq_be_riscv32
#define helper_atomic_fetch_uminw_be_mmu helper_atomic_fetch_uminw_be_mmu_riscv32
#define helper_atomic_fetch_uminw_be helper_atomic_fetch_uminw_be_riscv32
#define helper_atomic_fetch_smaxl_le_mmu helper_atomic_fetch_smaxl_le_mmu_riscv32
#define helper_atomic_fetch_smaxl_le helper_atomic_fetch_smaxl_le_riscv32
#define helper_atomic_fetch_smaxq_le_mmu helper_atomic_fetch_smaxq_le_mmu_riscv32
#define helper_atomic_fetch_smaxq_le helper_atomic_fetch_smaxq_le_riscv32
#define helper_atomic_fetch_smaxw_le_mmu helper_atomic_fetch_smaxw_le_mmu_riscv32
#define helper_atomic_fetch_smaxw_le helper_atomic_fetch_smaxw_le_riscv32
#define helper_atomic_fetch_sminl_le_mmu helper_atomic_fetch_sminl_le_mmu_riscv32
#define helper_atomic_fetch_sminl_le helper_atomic_fetch_sminl_le_riscv32
#define helper_atomic_fetch_sminq_le_mmu helper_atomic_fetch_sminq_le_mmu_riscv32
#define helper_atomic_fetch_sminq_le helper_atomic_fetch_sminq_le_riscv32
#define helper_atomic_fetch_sminw_le_mmu helper_atomic_fetch_sminw_le_mmu_riscv32
#define helper_atomic_fetch_sminw_le helper_atomic_fetch_sminw_le_riscv32
#define helper_atomic_fetch_umaxl_le_mmu helper_atomic_fetch_umaxl_le_mmu_riscv32
#define helper_atomic_fetch_umaxl_le helper_atomic_fetch_umaxl_le_riscv32
#define helper_atomic_fetch_umaxq_le_mmu helper_atomic_fetch_umaxq_le_mmu_riscv32
#define helper_atomic_fetch_umaxq_le helper_atomic_fetch_umaxq_le_riscv32
#define helper_atomic_fetch_umaxw_le_mmu helper_atomic_fetch_umaxw_le_mmu_riscv32
#define helper_atomic_fetch_umaxw_le helper_atomic_fetch_umaxw_le_riscv32
#define helper_atomic_fetch_uminl_le_mmu helper_atomic_fetch_uminl_le_mmu_riscv32
#define helper_atomic_fetch_uminl_le helper_atomic_fetch_uminl_le_riscv32
#define helper_atomic_fetch_uminq_le_mmu helper_atomic_fetch_uminq_le_mmu_riscv32
#define helper_atomic_fetch_uminq_le helper_atomic_fetch_uminq_le_riscv32
#define helper_atomic_fetch_uminw_le_mmu helper_atomic_fetch_uminw_le_mmu_riscv32
#define helper_atomic_fetch_uminw_le helper_atomic_fetch_uminw_le_riscv32
#define helper_atomic_fetch_xorb helper_atomic_fetch_xorb_riscv32
#define helper_atomic_fetch_xorb_mmu helper_atomic_fetch_xorb_mmu_riscv32
#define helper_atomic_fetch_xorl_be helper_atomic_fetch_xorl_be_riscv32
#define helper_atomic_fetch_xorl_be_mmu helper_atomic_fetch_xorl_be_mmu_riscv32
#define helper_atomic_fetch_xorl_le helper_atomic_fetch_xorl_le_riscv32
#define helper_atomic_fetch_xorl_le_mmu helper_atomic_fetch_xorl_le_mmu_riscv32
#define helper_atomic_fetch_xorq_be helper_atomic_fetch_xorq_be_riscv32
#define helper_atomic_fetch_xorq_be_mmu helper_atomic_fetch_xorq_be_mmu_riscv32
#define helper_atomic_fetch_xorq_le helper_atomic_fetch_xorq_le_riscv32
#define helper_atomic_fetch_xorq_le_mmu helper_atomic_fetch_xorq_le_mmu_riscv32
#define helper_atomic_fetch_xorw_be helper_atomic_fetch_xorw_be_riscv32
#define helper_atomic_fetch_xorw_be_mmu helper_atomic_fetch_xorw_be_mmu_riscv32
#define helper_atomic_fetch_xorw_le helper_atomic_fetch_xorw_le_riscv32
#define helper_atomic_fetch_xorw_le_mmu helper_atomic_fetch_xorw_le_mmu_riscv32
#define helper_atomic_ldo_be helper_atomic_ldo_be_riscv32
#define helper_atomic_ldo_be_mmu helper_atomic_ldo_be_mmu_riscv32
#define helper_atomic_ldo_le helper_atomic_ldo_le_riscv32
#define helper_atomic_ldo_le_mmu helper_atomic_ldo_le_mmu_riscv32
#define helper_atomic_or_fetchb helper_atomic_or_fetchb_riscv32
#define helper_atomic_or_fetchb_mmu helper_atomic_or_fetchb_mmu_riscv32
#define helper_atomic_or_fetchl_be helper_atomic_or_fetchl_be_riscv32
#define helper_atomic_or_fetchl_be_mmu helper_atomic_or_fetchl_be_mmu_riscv32
#define helper_atomic_or_fetchl_le helper_atomic_or_fetchl_le_riscv32
#define helper_atomic_or_fetchl_le_mmu helper_atomic_or_fetchl_le_mmu_riscv32
#define helper_atomic_or_fetchq_be helper_atomic_or_fetchq_be_riscv32
#define helper_atomic_or_fetchq_be_mmu helper_atomic_or_fetchq_be_mmu_riscv32
#define helper_atomic_or_fetchq_le helper_atomic_or_fetchq_le_riscv32
#define helper_atomic_or_fetchq_le_mmu helper_atomic_or_fetchq_le_mmu_riscv32
#define helper_atomic_or_fetchw_be helper_atomic_or_fetchw_be_riscv32
#define helper_atomic_or_fetchw_be_mmu helper_atomic_or_fetchw_be_mmu_riscv32
#define helper_atomic_or_fetchw_le helper_atomic_or_fetchw_le_riscv32
#define helper_atomic_or_fetchw_le_mmu helper_atomic_or_fetchw_le_mmu_riscv32
#define helper_atomic_smax_fetchb_mmu helper_atomic_smax_fetchb_mmu_riscv32
#define helper_atomic_smax_fetchb helper_atomic_smax_fetchb_riscv32
#define helper_atomic_smax_fetchl_be_mmu helper_atomic_smax_fetchl_be_mmu_riscv32
#define helper_atomic_smax_fetchl_be helper_atomic_smax_fetchl_be_riscv32
#define helper_atomic_smax_fetchq_be_mmu helper_atomic_smax_fetchq_be_mmu_riscv32
#define helper_atomic_smax_fetchq_be helper_atomic_smax_fetchq_be_riscv32
#define helper_atomic_smax_fetchw_be_mmu helper_atomic_smax_fetchw_be_mmu_riscv32
#define helper_atomic_smax_fetchw_be helper_atomic_smax_fetchw_be_riscv32
#define helper_atomic_smin_fetchb_mmu helper_atomic_smin_fetchb_mmu_riscv32
#define helper_atomic_smin_fetchb helper_atomic_smin_fetchb_riscv32
#define helper_atomic_smin_fetchl_be_mmu helper_atomic_smin_fetchl_be_mmu_riscv32
#define helper_atomic_smin_fetchl_be helper_atomic_smin_fetchl_be_riscv32
#define helper_atomic_smin_fetchq_be_mmu helper_atomic_smin_fetchq_be_mmu_riscv32
#define helper_atomic_smin_fetchq_be helper_atomic_smin_fetchq_be_riscv32
#define helper_atomic_smin_fetchw_be_mmu helper_atomic_smin_fetchw_be_mmu_riscv32
#define helper_atomic_smin_fetchw_be helper_atomic_smin_fetchw_be_riscv32
#define helper_atomic_smax_fetchl_le_mmu helper_atomic_smax_fetchl_le_mmu_riscv32
#define helper_atomic_smax_fetchl_le helper_atomic_smax_fetchl_le_riscv32
#define helper_atomic_smax_fetchq_le_mmu helper_atomic_smax_fetchq_le_mmu_riscv32
#define helper_atomic_smax_fetchq_le helper_atomic_smax_fetchq_le_riscv32
#define helper_atomic_smax_fetchw_le_mmu helper_atomic_smax_fetchw_le_mmu_riscv32
#define helper_atomic_smax_fetchw_le helper_atomic_smax_fetchw_le_riscv32
#define helper_atomic_smin_fetchl_le_mmu helper_atomic_smin_fetchl_le_mmu_riscv32
#define helper_atomic_smin_fetchl_le helper_atomic_smin_fetchl_le_riscv32
#define helper_atomic_smin_fetchq_le_mmu helper_atomic_smin_fetchq_le_mmu_riscv32
#define helper_atomic_smin_fetchq_le helper_atomic_smin_fetchq_le_riscv32
#define helper_atomic_smin_fetchw_le_mmu helper_atomic_smin_fetchw_le_mmu_riscv32
#define helper_atomic_smin_fetchw_le helper_atomic_smin_fetchw_le_riscv32
#define helper_atomic_sto_be helper_atomic_sto_be_riscv32
#define helper_atomic_sto_be_mmu helper_atomic_sto_be_mmu_riscv32
#define helper_atomic_sto_le helper_atomic_sto_le_riscv32
#define helper_atomic_sto_le_mmu helper_atomic_sto_le_mmu_riscv32
#define helper_atomic_umax_fetchb_mmu helper_atomic_umax_fetchb_mmu_riscv32
#define helper_atomic_umax_fetchb helper_atomic_umax_fetchb_riscv32
#define helper_atomic_umax_fetchl_be_mmu helper_atomic_umax_fetchl_be_mmu_riscv32
#define helper_atomic_umax_fetchl_be helper_atomic_umax_fetchl_be_riscv32
#define helper_atomic_umax_fetchq_be_mmu helper_atomic_umax_fetchq_be_mmu_riscv32
#define helper_atomic_umax_fetchq_be helper_atomic_umax_fetchq_be_riscv32
#define helper_atomic_umax_fetchw_be_mmu helper_atomic_umax_fetchw_be_mmu_riscv32
#define helper_atomic_umax_fetchw_be helper_atomic_umax_fetchw_be_riscv32
#define helper_atomic_umin_fetchb_mmu helper_atomic_umin_fetchb_mmu_riscv32
#define helper_atomic_umin_fetchb helper_atomic_umin_fetchb_riscv32
#define helper_atomic_umin_fetchl_be_mmu helper_atomic_umin_fetchl_be_mmu_riscv32
#define helper_atomic_umin_fetchl_be helper_atomic_umin_fetchl_be_riscv32
#define helper_atomic_umin_fetchq_be_mmu helper_atomic_umin_fetchq_be_mmu_riscv32
#define helper_atomic_umin_fetchq_be helper_atomic_umin_fetchq_be_riscv32
#define helper_atomic_umin_fetchw_be_mmu helper_atomic_umin_fetchw_be_mmu_riscv32
#define helper_atomic_umin_fetchw_be helper_atomic_umin_fetchw_be_riscv32
#define helper_atomic_umax_fetchl_le_mmu helper_atomic_umax_fetchl_le_mmu_riscv32
#define helper_atomic_umax_fetchl_le helper_atomic_umax_fetchl_le_riscv32
#define helper_atomic_umax_fetchq_le_mmu helper_atomic_umax_fetchq_le_mmu_riscv32
#define helper_atomic_umax_fetchq_le helper_atomic_umax_fetchq_le_riscv32
#define helper_atomic_umax_fetchw_le_mmu helper_atomic_umax_fetchw_le_mmu_riscv32
#define helper_atomic_umax_fetchw_le helper_atomic_umax_fetchw_le_riscv32
#define helper_atomic_umin_fetchl_le_mmu helper_atomic_umin_fetchl_le_mmu_riscv32
#define helper_atomic_umin_fetchl_le helper_atomic_umin_fetchl_le_riscv32
#define helper_atomic_umin_fetchq_le_mmu helper_atomic_umin_fetchq_le_mmu_riscv32
#define helper_atomic_umin_fetchq_le helper_atomic_umin_fetchq_le_riscv32
#define helper_atomic_umin_fetchw_le_mmu helper_atomic_umin_fetchw_le_mmu_riscv32
#define helper_atomic_umin_fetchw_le helper_atomic_umin_fetchw_le_riscv32
#define helper_atomic_xchgb helper_atomic_xchgb_riscv32
#define helper_atomic_xchgb helper_atomic_xchgb_riscv32
#define helper_atomic_xchgb_mmu helper_atomic_xchgb_mmu_riscv32
#define helper_atomic_xchgl_be helper_atomic_xchgl_be_riscv32
#define helper_atomic_xchgl_be_mmu helper_atomic_xchgl_be_mmu_riscv32
#define helper_atomic_xchgl_le helper_atomic_xchgl_le_riscv32
#define helper_atomic_xchgl_le_mmu helper_atomic_xchgl_le_mmu_riscv32
#define helper_atomic_xchgq_be helper_atomic_xchgq_be_riscv32
#define helper_atomic_xchgq_be_mmu helper_atomic_xchgq_be_mmu_riscv32
#define helper_atomic_xchgq_le helper_atomic_xchgq_le_riscv32
#define helper_atomic_xchgq_le_mmu helper_atomic_xchgq_le_mmu_riscv32
#define helper_atomic_xchgw_be helper_atomic_xchgw_be_riscv32
#define helper_atomic_xchgw_be_mmu helper_atomic_xchgw_be_mmu_riscv32
#define helper_atomic_xchgw_le helper_atomic_xchgw_le_riscv32
#define helper_atomic_xchgw_le_mmu helper_atomic_xchgw_le_mmu_riscv32
#define helper_atomic_xor_fetchb helper_atomic_xor_fetchb_riscv32
#define helper_atomic_xor_fetchb_mmu helper_atomic_xor_fetchb_mmu_riscv32
#define helper_atomic_xor_fetchl_be helper_atomic_xor_fetchl_be_riscv32
#define helper_atomic_xor_fetchl_be_mmu helper_atomic_xor_fetchl_be_mmu_riscv32
#define helper_atomic_xor_fetchl_le helper_atomic_xor_fetchl_le_riscv32
#define helper_atomic_xor_fetchl_le_mmu helper_atomic_xor_fetchl_le_mmu_riscv32
#define helper_atomic_xor_fetchq_be helper_atomic_xor_fetchq_be_riscv32
#define helper_atomic_xor_fetchq_be_mmu helper_atomic_xor_fetchq_be_mmu_riscv32
#define helper_atomic_xor_fetchq_le helper_atomic_xor_fetchq_le_riscv32
#define helper_atomic_xor_fetchq_le_mmu helper_atomic_xor_fetchq_le_mmu_riscv32
#define helper_atomic_xor_fetchw_be helper_atomic_xor_fetchw_be_riscv32
#define helper_atomic_xor_fetchw_be_mmu helper_atomic_xor_fetchw_be_mmu_riscv32
#define helper_atomic_xor_fetchw_le helper_atomic_xor_fetchw_le_riscv32
#define helper_atomic_xor_fetchw_le_mmu helper_atomic_xor_fetchw_le_mmu_riscv32
#define helper_be_ldl_cmmu helper_be_ldl_cmmu_riscv32
#define helper_be_ldq_cmmu helper_be_ldq_cmmu_riscv32
#define helper_be_ldq_mmu helper_be_ldq_mmu_riscv32
#define helper_be_ldsl_mmu helper_be_ldsl_mmu_riscv32
#define helper_be_ldsw_mmu helper_be_ldsw_mmu_riscv32
#define helper_be_ldul_mmu helper_be_ldul_mmu_riscv32
#define helper_be_lduw_mmu helper_be_lduw_mmu_riscv32
#define helper_be_ldw_cmmu helper_be_ldw_cmmu_riscv32
#define helper_be_stl_mmu helper_be_stl_mmu_riscv32
#define helper_be_stq_mmu helper_be_stq_mmu_riscv32
#define helper_be_stw_mmu helper_be_stw_mmu_riscv32
#define helper_clrsb_i32 helper_clrsb_i32_riscv32
#define helper_clrsb_i64 helper_clrsb_i64_riscv32
#define helper_clz_i32 helper_clz_i32_riscv32
#define helper_clz_i64 helper_clz_i64_riscv32
#define helper_ctpop_i32 helper_ctpop_i32_riscv32
#define helper_ctpop_i64 helper_ctpop_i64_riscv32
#define helper_ctz_i32 helper_ctz_i32_riscv32
#define helper_ctz_i64 helper_ctz_i64_riscv32
#define helper_cpsr_read helper_cpsr_read_riscv32
#define helper_cpsr_write helper_cpsr_write_riscv32
#define helper_cpsr_write_eret helper_cpsr_write_eret_riscv32
#define helper_crc32_arm helper_crc32_arm_riscv32
#define helper_crc32c helper_crc32c_riscv32
#define helper_crypto_aese helper_crypto_aese_riscv32
#define helper_crypto_aesmc helper_crypto_aesmc_riscv32
#define helper_crypto_sha1_3reg helper_crypto_sha1_3reg_riscv32
#define helper_crypto_sha1h helper_crypto_sha1h_riscv32
#define helper_crypto_sha1su1 helper_crypto_sha1su1_riscv32
#define helper_crypto_sha256h helper_crypto_sha256h_riscv32
#define helper_crypto_sha256h2 helper_crypto_sha256h2_riscv32
#define helper_crypto_sha256su0 helper_crypto_sha256su0_riscv32
#define helper_crypto_sha256su1 helper_crypto_sha256su1_riscv32
#define helper_crypto_sha512h helper_crypto_sha512h_riscv32
#define helper_crypto_sha512h2 helper_crypto_sha512h2_riscv32
#define helper_crypto_sha512su0 helper_crypto_sha512su0_riscv32
#define helper_crypto_sha512su1 helper_crypto_sha512su1_riscv32
#define helper_crypto_sm3partw1 helper_crypto_sm3partw1_riscv32
#define helper_crypto_sm3partw2 helper_crypto_sm3partw2_riscv32
#define helper_crypto_sm3tt helper_crypto_sm3tt_riscv32
#define helper_crypto_sm4e helper_crypto_sm4e_riscv32
#define helper_crypto_sm4ekey helper_crypto_sm4ekey_riscv32
#define helper_dc_zva helper_dc_zva_riscv32
#define helper_div_i32 helper_div_i32_riscv32
#define helper_div_i64 helper_div_i64_riscv32
#define helper_divu_i32 helper_divu_i32_riscv32
#define helper_divu_i64 helper_divu_i64_riscv32
#define helper_double_saturate helper_double_saturate_riscv32
#define helper_exception_bkpt_insn helper_exception_bkpt_insn_riscv32
#define helper_exception_internal helper_exception_internal_riscv32
#define helper_exception_return helper_exception_return_riscv32
#define helper_exception_with_syndrome helper_exception_with_syndrome_riscv32
#define helper_exit_atomic helper_exit_atomic_riscv32
#define helper_fcos helper_fcos_riscv32
#define helper_frint32_d helper_frint32_d_riscv32
#define helper_frint32_s helper_frint32_s_riscv32
#define helper_frint64_d helper_frint64_d_riscv32
#define helper_frint64_s helper_frint64_s_riscv32
#define helper_fscale helper_fscale_riscv32
#define helper_fsincos helper_fsincos_riscv32
#define helper_fsin helper_fsin_riscv32
#define helper_fsqrt helper_fsqrt_riscv32
#define helper_get_cp_reg helper_get_cp_reg_riscv32
#define helper_get_cp_reg64 helper_get_cp_reg64_riscv32
#define helper_get_r13_banked helper_get_r13_banked_riscv32
#define helper_get_user_reg helper_get_user_reg_riscv32
#define helper_gvec_add8 helper_gvec_add8_riscv32
#define helper_gvec_add16 helper_gvec_add16_riscv32
#define helper_gvec_add32 helper_gvec_add32_riscv32
#define helper_gvec_add64 helper_gvec_add64_riscv32
#define helper_gvec_adds8 helper_gvec_adds8_riscv32
#define helper_gvec_adds16 helper_gvec_adds16_riscv32
#define helper_gvec_adds32 helper_gvec_adds32_riscv32
#define helper_gvec_adds64 helper_gvec_adds64_riscv32
#define helper_gvec_and helper_gvec_and_riscv32
#define helper_gvec_andc helper_gvec_andc_riscv32
#define helper_gvec_ands helper_gvec_ands_riscv32
#define helper_gvec_dup8 helper_gvec_dup8_riscv32
#define helper_gvec_dup16 helper_gvec_dup16_riscv32
#define helper_gvec_dup32 helper_gvec_dup32_riscv32
#define helper_gvec_dup64 helper_gvec_dup64_riscv32
#define helper_gvec_eq8 helper_gvec_eq8_riscv32
#define helper_gvec_eq16 helper_gvec_eq16_riscv32
#define helper_gvec_eq32 helper_gvec_eq32_riscv32
#define helper_gvec_eq64 helper_gvec_eq64_riscv32
#define helper_gvec_eqv helper_gvec_eqv_riscv32
#define helper_gvec_fadd_d helper_gvec_fadd_d_riscv32
#define helper_gvec_fadd_h helper_gvec_fadd_h_riscv32
#define helper_gvec_fadd_s helper_gvec_fadd_s_riscv32
#define helper_gvec_fcaddh helper_gvec_fcaddh_riscv32
#define helper_gvec_fcadds helper_gvec_fcadds_riscv32
#define helper_gvec_fcaddd helper_gvec_fcaddd_riscv32
#define helper_gvec_fcmlad helper_gvec_fcmlad_riscv32
#define helper_gvec_fcmlah helper_gvec_fcmlah_riscv32
#define helper_gvec_fcmlah_idx helper_gvec_fcmlah_idx_riscv32
#define helper_gvec_fcmlas helper_gvec_fcmlas_riscv32
#define helper_gvec_fcmlas_idx helper_gvec_fcmlas_idx_riscv32
#define helper_gvec_fmla_idx_d helper_gvec_fmla_idx_d_riscv32
#define helper_gvec_fmla_idx_h helper_gvec_fmla_idx_h_riscv32
#define helper_gvec_fmla_idx_s helper_gvec_fmla_idx_s_riscv32
#define helper_gvec_fmlal_a32 helper_gvec_fmlal_a32_riscv32
#define helper_gvec_fmlal_a64 helper_gvec_fmlal_a64_riscv32
#define helper_gvec_fmlal_idx_a32 helper_gvec_fmlal_idx_a32_riscv32
#define helper_gvec_fmlal_idx_a64 helper_gvec_fmlal_idx_a64_riscv32
#define helper_gvec_fmul_d helper_gvec_fmul_d_riscv32
#define helper_gvec_fmul_h helper_gvec_fmul_h_riscv32
#define helper_gvec_fmul_s helper_gvec_fmul_s_riscv32
#define helper_gvec_fmul_idx_d helper_gvec_fmul_idx_d_riscv32
#define helper_gvec_fmul_idx_h helper_gvec_fmul_idx_h_riscv32
#define helper_gvec_fmul_idx_s helper_gvec_fmul_idx_s_riscv32
#define helper_gvec_frecpe_d helper_gvec_frecpe_d_riscv32
#define helper_gvec_frecpe_h helper_gvec_frecpe_h_riscv32
#define helper_gvec_frecpe_s helper_gvec_frecpe_s_riscv32
#define helper_gvec_frsqrte_d helper_gvec_frsqrte_d_riscv32
#define helper_gvec_frsqrte_h helper_gvec_frsqrte_h_riscv32
#define helper_gvec_frsqrte_s helper_gvec_frsqrte_s_riscv32
#define helper_gvec_fsub_d helper_gvec_fsub_d_riscv32
#define helper_gvec_fsub_h helper_gvec_fsub_h_riscv32
#define helper_gvec_fsub_s helper_gvec_fsub_s_riscv32
#define helper_gvec_ftsmul_d helper_gvec_ftsmul_d_riscv32
#define helper_gvec_ftsmul_h helper_gvec_ftsmul_h_riscv32
#define helper_gvec_ftsmul_s helper_gvec_ftsmul_s_riscv32
#define helper_gvec_le8 helper_gvec_le8_riscv32
#define helper_gvec_le16 helper_gvec_le16_riscv32
#define helper_gvec_le32 helper_gvec_le32_riscv32
#define helper_gvec_le64 helper_gvec_le64_riscv32
#define helper_gvec_leu8 helper_gvec_leu8_riscv32
#define helper_gvec_leu16 helper_gvec_leu16_riscv32
#define helper_gvec_leu32 helper_gvec_leu32_riscv32
#define helper_gvec_leu64 helper_gvec_leu64_riscv32
#define helper_gvec_lt8 helper_gvec_lt8_riscv32
#define helper_gvec_lt16 helper_gvec_lt16_riscv32
#define helper_gvec_lt32 helper_gvec_lt32_riscv32
#define helper_gvec_lt64 helper_gvec_lt64_riscv32
#define helper_gvec_ltu8 helper_gvec_ltu8_riscv32
#define helper_gvec_ltu16 helper_gvec_ltu16_riscv32
#define helper_gvec_ltu32 helper_gvec_ltu32_riscv32
#define helper_gvec_ltu64 helper_gvec_ltu64_riscv32
#define helper_gvec_mov helper_gvec_mov_riscv32
#define helper_gvec_mul8 helper_gvec_mul8_riscv32
#define helper_gvec_mul16 helper_gvec_mul16_riscv32
#define helper_gvec_mul32 helper_gvec_mul32_riscv32
#define helper_gvec_mul64 helper_gvec_mul64_riscv32
#define helper_gvec_muls8 helper_gvec_muls8_riscv32
#define helper_gvec_muls16 helper_gvec_muls16_riscv32
#define helper_gvec_muls32 helper_gvec_muls32_riscv32
#define helper_gvec_muls64 helper_gvec_muls64_riscv32
#define helper_gvec_nand helper_gvec_nand_riscv32
#define helper_gvec_ne8 helper_gvec_ne8_riscv32
#define helper_gvec_ne16 helper_gvec_ne16_riscv32
#define helper_gvec_ne32 helper_gvec_ne32_riscv32
#define helper_gvec_ne64 helper_gvec_ne64_riscv32
#define helper_gvec_neg8 helper_gvec_neg8_riscv32
#define helper_gvec_neg16 helper_gvec_neg16_riscv32
#define helper_gvec_neg32 helper_gvec_neg32_riscv32
#define helper_gvec_neg64 helper_gvec_neg64_riscv32
#define helper_gvec_nor helper_gvec_nor_riscv32
#define helper_gvec_not helper_gvec_not_riscv32
#define helper_gvec_or helper_gvec_or_riscv32
#define helper_gvec_orc helper_gvec_orc_riscv32
#define helper_gvec_ors helper_gvec_ors_riscv32
#define helper_gvec_qrdmlah_s16 helper_gvec_qrdmlah_s16_riscv32
#define helper_gvec_qrdmlah_s32 helper_gvec_qrdmlah_s32_riscv32
#define helper_gvec_qrdmlsh_s16 helper_gvec_qrdmlsh_s16_riscv32
#define helper_gvec_qrdmlsh_s32 helper_gvec_qrdmlsh_s32_riscv32
#define helper_gvec_sar8i helper_gvec_sar8i_riscv32
#define helper_gvec_sar16i helper_gvec_sar16i_riscv32
#define helper_gvec_sar32i helper_gvec_sar32i_riscv32
#define helper_gvec_sar64i helper_gvec_sar64i_riscv32
#define helper_gvec_sdot_b helper_gvec_sdot_b_riscv32
#define helper_gvec_sdot_h helper_gvec_sdot_h_riscv32
#define helper_gvec_sdot_idx_b helper_gvec_sdot_idx_b_riscv32
#define helper_gvec_sdot_idx_h helper_gvec_sdot_idx_h_riscv32
#define helper_gvec_shl8i helper_gvec_shl8i_riscv32
#define helper_gvec_shl16i helper_gvec_shl16i_riscv32
#define helper_gvec_shl32i helper_gvec_shl32i_riscv32
#define helper_gvec_shl64i helper_gvec_shl64i_riscv32
#define helper_gvec_shr8i helper_gvec_shr8i_riscv32
#define helper_gvec_shr16i helper_gvec_shr16i_riscv32
#define helper_gvec_shr32i helper_gvec_shr32i_riscv32
#define helper_gvec_shr64i helper_gvec_shr64i_riscv32
#define helper_gvec_smax8 helper_gvec_smax8_riscv32
#define helper_gvec_smax16 helper_gvec_smax16_riscv32
#define helper_gvec_smax32 helper_gvec_smax32_riscv32
#define helper_gvec_smax64 helper_gvec_smax64_riscv32
#define helper_gvec_smin8 helper_gvec_smin8_riscv32
#define helper_gvec_smin16 helper_gvec_smin16_riscv32
#define helper_gvec_smin32 helper_gvec_smin32_riscv32
#define helper_gvec_smin64 helper_gvec_smin64_riscv32
#define helper_gvec_sqadd_b helper_gvec_sqadd_b_riscv32
#define helper_gvec_sqadd_d helper_gvec_sqadd_d_riscv32
#define helper_gvec_sqadd_h helper_gvec_sqadd_h_riscv32
#define helper_gvec_sqadd_s helper_gvec_sqadd_s_riscv32
#define helper_gvec_sqsub_b helper_gvec_sqsub_b_riscv32
#define helper_gvec_sqsub_d helper_gvec_sqsub_d_riscv32
#define helper_gvec_sqsub_h helper_gvec_sqsub_h_riscv32
#define helper_gvec_sqsub_s helper_gvec_sqsub_s_riscv32
#define helper_gvec_sub8 helper_gvec_sub8_riscv32
#define helper_gvec_sub16 helper_gvec_sub16_riscv32
#define helper_gvec_sub32 helper_gvec_sub32_riscv32
#define helper_gvec_sub64 helper_gvec_sub64_riscv32
#define helper_gvec_subs8 helper_gvec_subs8_riscv32
#define helper_gvec_subs16 helper_gvec_subs16_riscv32
#define helper_gvec_subs32 helper_gvec_subs32_riscv32
#define helper_gvec_subs64 helper_gvec_subs64_riscv32
#define helper_gvec_ssadd8 helper_gvec_ssadd8_riscv32
#define helper_gvec_ssadd16 helper_gvec_ssadd16_riscv32
#define helper_gvec_ssadd32 helper_gvec_ssadd32_riscv32
#define helper_gvec_ssadd64 helper_gvec_ssadd64_riscv32
#define helper_gvec_sssub8 helper_gvec_sssub8_riscv32
#define helper_gvec_sssub16 helper_gvec_sssub16_riscv32
#define helper_gvec_sssub32 helper_gvec_sssub32_riscv32
#define helper_gvec_sssub64 helper_gvec_sssub64_riscv32
#define helper_gvec_udot_b helper_gvec_udot_b_riscv32
#define helper_gvec_udot_h helper_gvec_udot_h_riscv32
#define helper_gvec_udot_idx_b helper_gvec_udot_idx_b_riscv32
#define helper_gvec_udot_idx_h helper_gvec_udot_idx_h_riscv32
#define helper_gvec_umax8 helper_gvec_umax8_riscv32
#define helper_gvec_umax16 helper_gvec_umax16_riscv32
#define helper_gvec_umax32 helper_gvec_umax32_riscv32
#define helper_gvec_umax64 helper_gvec_umax64_riscv32
#define helper_gvec_umin8 helper_gvec_umin8_riscv32
#define helper_gvec_umin16 helper_gvec_umin16_riscv32
#define helper_gvec_umin32 helper_gvec_umin32_riscv32
#define helper_gvec_umin64 helper_gvec_umin64_riscv32
#define helper_gvec_uqadd_b helper_gvec_uqadd_b_riscv32
#define helper_gvec_uqadd_d helper_gvec_uqadd_d_riscv32
#define helper_gvec_uqadd_h helper_gvec_uqadd_h_riscv32
#define helper_gvec_uqadd_s helper_gvec_uqadd_s_riscv32
#define helper_gvec_uqsub_b helper_gvec_uqsub_b_riscv32
#define helper_gvec_uqsub_d helper_gvec_uqsub_d_riscv32
#define helper_gvec_uqsub_h helper_gvec_uqsub_h_riscv32
#define helper_gvec_uqsub_s helper_gvec_uqsub_s_riscv32
#define helper_gvec_usadd8 helper_gvec_usadd8_riscv32
#define helper_gvec_usadd16 helper_gvec_usadd16_riscv32
#define helper_gvec_usadd32 helper_gvec_usadd32_riscv32
#define helper_gvec_usadd64 helper_gvec_usadd64_riscv32
#define helper_gvec_ussub8 helper_gvec_ussub8_riscv32
#define helper_gvec_ussub16 helper_gvec_ussub16_riscv32
#define helper_gvec_ussub32 helper_gvec_ussub32_riscv32
#define helper_gvec_ussub64 helper_gvec_ussub64_riscv32
#define helper_gvec_xor helper_gvec_xor_riscv32
#define helper_gvec_xors helper_gvec_xors_riscv32
#define helper_iwmmxt_addcb helper_iwmmxt_addcb_riscv32
#define helper_iwmmxt_addcl helper_iwmmxt_addcl_riscv32
#define helper_iwmmxt_addcw helper_iwmmxt_addcw_riscv32
#define helper_iwmmxt_addnb helper_iwmmxt_addnb_riscv32
#define helper_iwmmxt_addnl helper_iwmmxt_addnl_riscv32
#define helper_iwmmxt_addnw helper_iwmmxt_addnw_riscv32
#define helper_iwmmxt_addsb helper_iwmmxt_addsb_riscv32
#define helper_iwmmxt_addsl helper_iwmmxt_addsl_riscv32
#define helper_iwmmxt_addsw helper_iwmmxt_addsw_riscv32
#define helper_iwmmxt_addub helper_iwmmxt_addub_riscv32
#define helper_iwmmxt_addul helper_iwmmxt_addul_riscv32
#define helper_iwmmxt_adduw helper_iwmmxt_adduw_riscv32
#define helper_iwmmxt_align helper_iwmmxt_align_riscv32
#define helper_iwmmxt_avgb0 helper_iwmmxt_avgb0_riscv32
#define helper_iwmmxt_avgb1 helper_iwmmxt_avgb1_riscv32
#define helper_iwmmxt_avgw0 helper_iwmmxt_avgw0_riscv32
#define helper_iwmmxt_avgw1 helper_iwmmxt_avgw1_riscv32
#define helper_iwmmxt_bcstb helper_iwmmxt_bcstb_riscv32
#define helper_iwmmxt_bcstl helper_iwmmxt_bcstl_riscv32
#define helper_iwmmxt_bcstw helper_iwmmxt_bcstw_riscv32
#define helper_iwmmxt_cmpeqb helper_iwmmxt_cmpeqb_riscv32
#define helper_iwmmxt_cmpeql helper_iwmmxt_cmpeql_riscv32
#define helper_iwmmxt_cmpeqw helper_iwmmxt_cmpeqw_riscv32
#define helper_iwmmxt_cmpgtsb helper_iwmmxt_cmpgtsb_riscv32
#define helper_iwmmxt_cmpgtsl helper_iwmmxt_cmpgtsl_riscv32
#define helper_iwmmxt_cmpgtsw helper_iwmmxt_cmpgtsw_riscv32
#define helper_iwmmxt_cmpgtub helper_iwmmxt_cmpgtub_riscv32
#define helper_iwmmxt_cmpgtul helper_iwmmxt_cmpgtul_riscv32
#define helper_iwmmxt_cmpgtuw helper_iwmmxt_cmpgtuw_riscv32
#define helper_iwmmxt_insr helper_iwmmxt_insr_riscv32
#define helper_iwmmxt_macsw helper_iwmmxt_macsw_riscv32
#define helper_iwmmxt_macuw helper_iwmmxt_macuw_riscv32
#define helper_iwmmxt_maddsq helper_iwmmxt_maddsq_riscv32
#define helper_iwmmxt_madduq helper_iwmmxt_madduq_riscv32
#define helper_iwmmxt_maxsb helper_iwmmxt_maxsb_riscv32
#define helper_iwmmxt_maxsl helper_iwmmxt_maxsl_riscv32
#define helper_iwmmxt_maxsw helper_iwmmxt_maxsw_riscv32
#define helper_iwmmxt_maxub helper_iwmmxt_maxub_riscv32
#define helper_iwmmxt_maxul helper_iwmmxt_maxul_riscv32
#define helper_iwmmxt_maxuw helper_iwmmxt_maxuw_riscv32
#define helper_iwmmxt_minsb helper_iwmmxt_minsb_riscv32
#define helper_iwmmxt_minsl helper_iwmmxt_minsl_riscv32
#define helper_iwmmxt_minsw helper_iwmmxt_minsw_riscv32
#define helper_iwmmxt_minub helper_iwmmxt_minub_riscv32
#define helper_iwmmxt_minul helper_iwmmxt_minul_riscv32
#define helper_iwmmxt_minuw helper_iwmmxt_minuw_riscv32
#define helper_iwmmxt_msbb helper_iwmmxt_msbb_riscv32
#define helper_iwmmxt_msbl helper_iwmmxt_msbl_riscv32
#define helper_iwmmxt_msbw helper_iwmmxt_msbw_riscv32
#define helper_iwmmxt_muladdsl helper_iwmmxt_muladdsl_riscv32
#define helper_iwmmxt_muladdsw helper_iwmmxt_muladdsw_riscv32
#define helper_iwmmxt_muladdswl helper_iwmmxt_muladdswl_riscv32
#define helper_iwmmxt_mulshw helper_iwmmxt_mulshw_riscv32
#define helper_iwmmxt_mulslw helper_iwmmxt_mulslw_riscv32
#define helper_iwmmxt_muluhw helper_iwmmxt_muluhw_riscv32
#define helper_iwmmxt_mululw helper_iwmmxt_mululw_riscv32
#define helper_iwmmxt_packsl helper_iwmmxt_packsl_riscv32
#define helper_iwmmxt_packsq helper_iwmmxt_packsq_riscv32
#define helper_iwmmxt_packsw helper_iwmmxt_packsw_riscv32
#define helper_iwmmxt_packul helper_iwmmxt_packul_riscv32
#define helper_iwmmxt_packuq helper_iwmmxt_packuq_riscv32
#define helper_iwmmxt_packuw helper_iwmmxt_packuw_riscv32
#define helper_iwmmxt_rorl helper_iwmmxt_rorl_riscv32
#define helper_iwmmxt_rorq helper_iwmmxt_rorq_riscv32
#define helper_iwmmxt_rorw helper_iwmmxt_rorw_riscv32
#define helper_iwmmxt_sadb helper_iwmmxt_sadb_riscv32
#define helper_iwmmxt_sadw helper_iwmmxt_sadw_riscv32
#define helper_iwmmxt_setpsr_nz helper_iwmmxt_setpsr_nz_riscv32
#define helper_iwmmxt_shufh helper_iwmmxt_shufh_riscv32
#define helper_iwmmxt_slll helper_iwmmxt_slll_riscv32
#define helper_iwmmxt_sllq helper_iwmmxt_sllq_riscv32
#define helper_iwmmxt_sllw helper_iwmmxt_sllw_riscv32
#define helper_iwmmxt_sral helper_iwmmxt_sral_riscv32
#define helper_iwmmxt_sraq helper_iwmmxt_sraq_riscv32
#define helper_iwmmxt_sraw helper_iwmmxt_sraw_riscv32
#define helper_iwmmxt_srll helper_iwmmxt_srll_riscv32
#define helper_iwmmxt_srlq helper_iwmmxt_srlq_riscv32
#define helper_iwmmxt_srlw helper_iwmmxt_srlw_riscv32
#define helper_iwmmxt_subnb helper_iwmmxt_subnb_riscv32
#define helper_iwmmxt_subnl helper_iwmmxt_subnl_riscv32
#define helper_iwmmxt_subnw helper_iwmmxt_subnw_riscv32
#define helper_iwmmxt_subsb helper_iwmmxt_subsb_riscv32
#define helper_iwmmxt_subsl helper_iwmmxt_subsl_riscv32
#define helper_iwmmxt_subsw helper_iwmmxt_subsw_riscv32
#define helper_iwmmxt_subub helper_iwmmxt_subub_riscv32
#define helper_iwmmxt_subul helper_iwmmxt_subul_riscv32
#define helper_iwmmxt_subuw helper_iwmmxt_subuw_riscv32
#define helper_iwmmxt_unpackhb helper_iwmmxt_unpackhb_riscv32
#define helper_iwmmxt_unpackhl helper_iwmmxt_unpackhl_riscv32
#define helper_iwmmxt_unpackhsb helper_iwmmxt_unpackhsb_riscv32
#define helper_iwmmxt_unpackhsl helper_iwmmxt_unpackhsl_riscv32
#define helper_iwmmxt_unpackhsw helper_iwmmxt_unpackhsw_riscv32
#define helper_iwmmxt_unpackhub helper_iwmmxt_unpackhub_riscv32
#define helper_iwmmxt_unpackhul helper_iwmmxt_unpackhul_riscv32
#define helper_iwmmxt_unpackhuw helper_iwmmxt_unpackhuw_riscv32
#define helper_iwmmxt_unpackhw helper_iwmmxt_unpackhw_riscv32
#define helper_iwmmxt_unpacklb helper_iwmmxt_unpacklb_riscv32
#define helper_iwmmxt_unpackll helper_iwmmxt_unpackll_riscv32
#define helper_iwmmxt_unpacklsb helper_iwmmxt_unpacklsb_riscv32
#define helper_iwmmxt_unpacklsl helper_iwmmxt_unpacklsl_riscv32
#define helper_iwmmxt_unpacklsw helper_iwmmxt_unpacklsw_riscv32
#define helper_iwmmxt_unpacklub helper_iwmmxt_unpacklub_riscv32
#define helper_iwmmxt_unpacklul helper_iwmmxt_unpacklul_riscv32
#define helper_iwmmxt_unpackluw helper_iwmmxt_unpackluw_riscv32
#define helper_iwmmxt_unpacklw helper_iwmmxt_unpacklw_riscv32
#define helper_ldb_cmmu helper_ldb_cmmu_riscv32
#define helper_ldb_mmu helper_ldb_mmu_riscv32
#define helper_ldl_cmmu helper_ldl_cmmu_riscv32
#define helper_ldl_mmu helper_ldl_mmu_riscv32
#define helper_ldq_cmmu helper_ldq_cmmu_riscv32
#define helper_ldq_mmu helper_ldq_mmu_riscv32
#define helper_ldw_cmmu helper_ldw_cmmu_riscv32
#define helper_ldw_mmu helper_ldw_mmu_riscv32
#define helper_le_ldl_cmmu helper_le_ldl_cmmu_riscv32
#define helper_le_ldq_cmmu helper_le_ldq_cmmu_riscv32
#define helper_le_ldq_mmu helper_le_ldq_mmu_riscv32
#define helper_le_ldsl_mmu helper_le_ldsl_mmu_riscv32
#define helper_le_ldsw_mmu helper_le_ldsw_mmu_riscv32
#define helper_le_ldul_mmu helper_le_ldul_mmu_riscv32
#define helper_le_lduw_mmu helper_le_lduw_mmu_riscv32
#define helper_le_ldw_cmmu helper_le_ldw_cmmu_riscv32
#define helper_le_stl_mmu helper_le_stl_mmu_riscv32
#define helper_le_stq_mmu helper_le_stq_mmu_riscv32
#define helper_le_stw_mmu helper_le_stw_mmu_riscv32
#define helper_lookup_tb_ptr helper_lookup_tb_ptr_riscv32
#define helper_mulsh_i32 helper_mulsh_i32_riscv32
#define helper_mulsh_i64 helper_mulsh_i64_riscv32
#define helper_muluh_i32 helper_muluh_i32_riscv32
#define helper_muluh_i64 helper_muluh_i64_riscv32
#define helper_mrs_banked helper_mrs_banked_riscv32
#define helper_msa_ld_b helper_msa_ld_b_riscv32
#define helper_msa_ld_d helper_msa_ld_d_riscv32
#define helper_msa_ld_h helper_msa_ld_h_riscv32
#define helper_msa_ld_w helper_msa_ld_w_riscv32
#define helper_msa_st_b helper_msa_st_b_riscv32
#define helper_msa_st_d helper_msa_st_d_riscv32
#define helper_msa_st_h helper_msa_st_h_riscv32
#define helper_msa_st_w helper_msa_st_w_riscv32
#define helper_msr_banked helper_msr_banked_riscv32
#define helper_neon_abd_f32 helper_neon_abd_f32_riscv32
#define helper_neon_abd_s16 helper_neon_abd_s16_riscv32
#define helper_neon_abd_s32 helper_neon_abd_s32_riscv32
#define helper_neon_abd_s8 helper_neon_abd_s8_riscv32
#define helper_neon_abd_u16 helper_neon_abd_u16_riscv32
#define helper_neon_abd_u32 helper_neon_abd_u32_riscv32
#define helper_neon_abd_u8 helper_neon_abd_u8_riscv32
#define helper_neon_abdl_s16 helper_neon_abdl_s16_riscv32
#define helper_neon_abdl_s32 helper_neon_abdl_s32_riscv32
#define helper_neon_abdl_s64 helper_neon_abdl_s64_riscv32
#define helper_neon_abdl_u16 helper_neon_abdl_u16_riscv32
#define helper_neon_abdl_u32 helper_neon_abdl_u32_riscv32
#define helper_neon_abdl_u64 helper_neon_abdl_u64_riscv32
#define helper_neon_abs_s16 helper_neon_abs_s16_riscv32
#define helper_neon_abs_s8 helper_neon_abs_s8_riscv32
#define helper_neon_acge_f32 helper_neon_acge_f32_riscv32
#define helper_neon_acge_f64 helper_neon_acge_f64_riscv32
#define helper_neon_acgt_f32 helper_neon_acgt_f32_riscv32
#define helper_neon_acgt_f64 helper_neon_acgt_f64_riscv32
#define helper_neon_add_u16 helper_neon_add_u16_riscv32
#define helper_neon_add_u8 helper_neon_add_u8_riscv32
#define helper_neon_addl_saturate_s32 helper_neon_addl_saturate_s32_riscv32
#define helper_neon_addl_saturate_s64 helper_neon_addl_saturate_s64_riscv32
#define helper_neon_addl_u16 helper_neon_addl_u16_riscv32
#define helper_neon_addl_u32 helper_neon_addl_u32_riscv32
#define helper_neon_ceq_f32 helper_neon_ceq_f32_riscv32
#define helper_neon_ceq_u16 helper_neon_ceq_u16_riscv32
#define helper_neon_ceq_u32 helper_neon_ceq_u32_riscv32
#define helper_neon_ceq_u8 helper_neon_ceq_u8_riscv32
#define helper_neon_cge_f32 helper_neon_cge_f32_riscv32
#define helper_neon_cge_s16 helper_neon_cge_s16_riscv32
#define helper_neon_cge_s32 helper_neon_cge_s32_riscv32
#define helper_neon_cge_s8 helper_neon_cge_s8_riscv32
#define helper_neon_cge_u16 helper_neon_cge_u16_riscv32
#define helper_neon_cge_u32 helper_neon_cge_u32_riscv32
#define helper_neon_cge_u8 helper_neon_cge_u8_riscv32
#define helper_neon_cgt_f32 helper_neon_cgt_f32_riscv32
#define helper_neon_cgt_s16 helper_neon_cgt_s16_riscv32
#define helper_neon_cgt_s32 helper_neon_cgt_s32_riscv32
#define helper_neon_cgt_s8 helper_neon_cgt_s8_riscv32
#define helper_neon_cgt_u16 helper_neon_cgt_u16_riscv32
#define helper_neon_cgt_u32 helper_neon_cgt_u32_riscv32
#define helper_neon_cgt_u8 helper_neon_cgt_u8_riscv32
#define helper_neon_cls_s16 helper_neon_cls_s16_riscv32
#define helper_neon_cls_s32 helper_neon_cls_s32_riscv32
#define helper_neon_cls_s8 helper_neon_cls_s8_riscv32
#define helper_neon_clz_u16 helper_neon_clz_u16_riscv32
#define helper_neon_clz_u8 helper_neon_clz_u8_riscv32
#define helper_neon_cnt_u8 helper_neon_cnt_u8_riscv32
#define helper_neon_fcvt_f16_to_f32 helper_neon_fcvt_f16_to_f32_riscv32
#define helper_neon_fcvt_f32_to_f16 helper_neon_fcvt_f32_to_f16_riscv32
#define helper_neon_hadd_s16 helper_neon_hadd_s16_riscv32
#define helper_neon_hadd_s32 helper_neon_hadd_s32_riscv32
#define helper_neon_hadd_s8 helper_neon_hadd_s8_riscv32
#define helper_neon_hadd_u16 helper_neon_hadd_u16_riscv32
#define helper_neon_hadd_u32 helper_neon_hadd_u32_riscv32
#define helper_neon_hadd_u8 helper_neon_hadd_u8_riscv32
#define helper_neon_hsub_s16 helper_neon_hsub_s16_riscv32
#define helper_neon_hsub_s32 helper_neon_hsub_s32_riscv32
#define helper_neon_hsub_s8 helper_neon_hsub_s8_riscv32
#define helper_neon_hsub_u16 helper_neon_hsub_u16_riscv32
#define helper_neon_hsub_u32 helper_neon_hsub_u32_riscv32
#define helper_neon_hsub_u8 helper_neon_hsub_u8_riscv32
#define helper_neon_max_s16 helper_neon_max_s16_riscv32
#define helper_neon_max_s32 helper_neon_max_s32_riscv32
#define helper_neon_max_s8 helper_neon_max_s8_riscv32
#define helper_neon_max_u16 helper_neon_max_u16_riscv32
#define helper_neon_max_u32 helper_neon_max_u32_riscv32
#define helper_neon_max_u8 helper_neon_max_u8_riscv32
#define helper_neon_min_s16 helper_neon_min_s16_riscv32
#define helper_neon_min_s32 helper_neon_min_s32_riscv32
#define helper_neon_min_s8 helper_neon_min_s8_riscv32
#define helper_neon_min_u16 helper_neon_min_u16_riscv32
#define helper_neon_min_u32 helper_neon_min_u32_riscv32
#define helper_neon_min_u8 helper_neon_min_u8_riscv32
#define helper_neon_mul_p8 helper_neon_mul_p8_riscv32
#define helper_neon_mul_u16 helper_neon_mul_u16_riscv32
#define helper_neon_mul_u8 helper_neon_mul_u8_riscv32
#define helper_neon_mull_p8 helper_neon_mull_p8_riscv32
#define helper_neon_mull_s16 helper_neon_mull_s16_riscv32
#define helper_neon_mull_s8 helper_neon_mull_s8_riscv32
#define helper_neon_mull_u16 helper_neon_mull_u16_riscv32
#define helper_neon_mull_u8 helper_neon_mull_u8_riscv32
#define helper_neon_narrow_high_u16 helper_neon_narrow_high_u16_riscv32
#define helper_neon_narrow_high_u8 helper_neon_narrow_high_u8_riscv32
#define helper_neon_narrow_round_high_u16 helper_neon_narrow_round_high_u16_riscv32
#define helper_neon_narrow_round_high_u8 helper_neon_narrow_round_high_u8_riscv32
#define helper_neon_narrow_sat_s16 helper_neon_narrow_sat_s16_riscv32
#define helper_neon_narrow_sat_s32 helper_neon_narrow_sat_s32_riscv32
#define helper_neon_narrow_sat_s8 helper_neon_narrow_sat_s8_riscv32
#define helper_neon_narrow_sat_u16 helper_neon_narrow_sat_u16_riscv32
#define helper_neon_narrow_sat_u32 helper_neon_narrow_sat_u32_riscv32
#define helper_neon_narrow_sat_u8 helper_neon_narrow_sat_u8_riscv32
#define helper_neon_narrow_u16 helper_neon_narrow_u16_riscv32
#define helper_neon_narrow_u8 helper_neon_narrow_u8_riscv32
#define helper_neon_negl_u16 helper_neon_negl_u16_riscv32
#define helper_neon_negl_u32 helper_neon_negl_u32_riscv32
#define helper_neon_padd_u16 helper_neon_padd_u16_riscv32
#define helper_neon_padd_u8 helper_neon_padd_u8_riscv32
#define helper_neon_paddl_u16 helper_neon_paddl_u16_riscv32
#define helper_neon_paddl_u32 helper_neon_paddl_u32_riscv32
#define helper_neon_pmax_s16 helper_neon_pmax_s16_riscv32
#define helper_neon_pmax_s8 helper_neon_pmax_s8_riscv32
#define helper_neon_pmax_u16 helper_neon_pmax_u16_riscv32
#define helper_neon_pmax_u8 helper_neon_pmax_u8_riscv32
#define helper_neon_pmin_s16 helper_neon_pmin_s16_riscv32
#define helper_neon_pmin_s8 helper_neon_pmin_s8_riscv32
#define helper_neon_pmin_u16 helper_neon_pmin_u16_riscv32
#define helper_neon_pmin_u8 helper_neon_pmin_u8_riscv32
#define helper_neon_pmull_64_hi helper_neon_pmull_64_hi_riscv32
#define helper_neon_pmull_64_lo helper_neon_pmull_64_lo_riscv32
#define helper_neon_qabs_s16 helper_neon_qabs_s16_riscv32
#define helper_neon_qabs_s32 helper_neon_qabs_s32_riscv32
#define helper_neon_qabs_s64 helper_neon_qabs_s64_riscv32
#define helper_neon_qabs_s8 helper_neon_qabs_s8_riscv32
#define helper_neon_qadd_s16 helper_neon_qadd_s16_riscv32
#define helper_neon_qadd_s32 helper_neon_qadd_s32_riscv32
#define helper_neon_qadd_s64 helper_neon_qadd_s64_riscv32
#define helper_neon_qadd_s8 helper_neon_qadd_s8_riscv32
#define helper_neon_qadd_u16 helper_neon_qadd_u16_riscv32
#define helper_neon_qadd_u32 helper_neon_qadd_u32_riscv32
#define helper_neon_qadd_u64 helper_neon_qadd_u64_riscv32
#define helper_neon_qadd_u8 helper_neon_qadd_u8_riscv32
#define helper_neon_qdmulh_s16 helper_neon_qdmulh_s16_riscv32
#define helper_neon_qdmulh_s32 helper_neon_qdmulh_s32_riscv32
#define helper_neon_qneg_s16 helper_neon_qneg_s16_riscv32
#define helper_neon_qneg_s32 helper_neon_qneg_s32_riscv32
#define helper_neon_qneg_s64 helper_neon_qneg_s64_riscv32
#define helper_neon_qneg_s8 helper_neon_qneg_s8_riscv32
#define helper_neon_qrdmlah_s16 helper_neon_qrdmlah_s16_riscv32
#define helper_neon_qrdmlah_s32 helper_neon_qrdmlah_s32_riscv32
#define helper_neon_qrdmlsh_s16 helper_neon_qrdmlsh_s16_riscv32
#define helper_neon_qrdmlsh_s32 helper_neon_qrdmlsh_s32_riscv32
#define helper_neon_qrdmulh_s16 helper_neon_qrdmulh_s16_riscv32
#define helper_neon_qrdmulh_s32 helper_neon_qrdmulh_s32_riscv32
#define helper_neon_qrshl_s16 helper_neon_qrshl_s16_riscv32
#define helper_neon_qrshl_s32 helper_neon_qrshl_s32_riscv32
#define helper_neon_qrshl_s64 helper_neon_qrshl_s64_riscv32
#define helper_neon_qrshl_s8 helper_neon_qrshl_s8_riscv32
#define helper_neon_qrshl_u16 helper_neon_qrshl_u16_riscv32
#define helper_neon_qrshl_u32 helper_neon_qrshl_u32_riscv32
#define helper_neon_qrshl_u64 helper_neon_qrshl_u64_riscv32
#define helper_neon_qrshl_u8 helper_neon_qrshl_u8_riscv32
#define helper_neon_qshl_s16 helper_neon_qshl_s16_riscv32
#define helper_neon_qshl_s32 helper_neon_qshl_s32_riscv32
#define helper_neon_qshl_s64 helper_neon_qshl_s64_riscv32
#define helper_neon_qshl_s8 helper_neon_qshl_s8_riscv32
#define helper_neon_qshl_u16 helper_neon_qshl_u16_riscv32
#define helper_neon_qshl_u32 helper_neon_qshl_u32_riscv32
#define helper_neon_qshl_u64 helper_neon_qshl_u64_riscv32
#define helper_neon_qshl_u8 helper_neon_qshl_u8_riscv32
#define helper_neon_qshlu_s16 helper_neon_qshlu_s16_riscv32
#define helper_neon_qshlu_s32 helper_neon_qshlu_s32_riscv32
#define helper_neon_qshlu_s64 helper_neon_qshlu_s64_riscv32
#define helper_neon_qshlu_s8 helper_neon_qshlu_s8_riscv32
#define helper_neon_qsub_s16 helper_neon_qsub_s16_riscv32
#define helper_neon_qsub_s32 helper_neon_qsub_s32_riscv32
#define helper_neon_qsub_s64 helper_neon_qsub_s64_riscv32
#define helper_neon_qsub_s8 helper_neon_qsub_s8_riscv32
#define helper_neon_qsub_u16 helper_neon_qsub_u16_riscv32
#define helper_neon_qsub_u32 helper_neon_qsub_u32_riscv32
#define helper_neon_qsub_u64 helper_neon_qsub_u64_riscv32
#define helper_neon_qsub_u8 helper_neon_qsub_u8_riscv32
#define helper_neon_qunzip16 helper_neon_qunzip16_riscv32
#define helper_neon_qunzip32 helper_neon_qunzip32_riscv32
#define helper_neon_qunzip8 helper_neon_qunzip8_riscv32
#define helper_neon_qzip16 helper_neon_qzip16_riscv32
#define helper_neon_qzip32 helper_neon_qzip32_riscv32
#define helper_neon_qzip8 helper_neon_qzip8_riscv32
#define helper_neon_rbit_u8 helper_neon_rbit_u8_riscv32
#define helper_neon_rhadd_s16 helper_neon_rhadd_s16_riscv32
#define helper_neon_rhadd_s32 helper_neon_rhadd_s32_riscv32
#define helper_neon_rhadd_s8 helper_neon_rhadd_s8_riscv32
#define helper_neon_rhadd_u16 helper_neon_rhadd_u16_riscv32
#define helper_neon_rhadd_u32 helper_neon_rhadd_u32_riscv32
#define helper_neon_rhadd_u8 helper_neon_rhadd_u8_riscv32
#define helper_neon_rshl_s16 helper_neon_rshl_s16_riscv32
#define helper_neon_rshl_s32 helper_neon_rshl_s32_riscv32
#define helper_neon_rshl_s64 helper_neon_rshl_s64_riscv32
#define helper_neon_rshl_s8 helper_neon_rshl_s8_riscv32
#define helper_neon_rshl_u16 helper_neon_rshl_u16_riscv32
#define helper_neon_rshl_u32 helper_neon_rshl_u32_riscv32
#define helper_neon_rshl_u64 helper_neon_rshl_u64_riscv32
#define helper_neon_rshl_u8 helper_neon_rshl_u8_riscv32
#define helper_neon_shl_s16 helper_neon_shl_s16_riscv32
#define helper_neon_shl_s32 helper_neon_shl_s32_riscv32
#define helper_neon_shl_s64 helper_neon_shl_s64_riscv32
#define helper_neon_shl_s8 helper_neon_shl_s8_riscv32
#define helper_neon_shl_u16 helper_neon_shl_u16_riscv32
#define helper_neon_shl_u32 helper_neon_shl_u32_riscv32
#define helper_neon_shl_u64 helper_neon_shl_u64_riscv32
#define helper_neon_shl_u8 helper_neon_shl_u8_riscv32
#define helper_neon_sqadd_u16 helper_neon_sqadd_u16_riscv32
#define helper_neon_sqadd_u32 helper_neon_sqadd_u32_riscv32
#define helper_neon_sqadd_u64 helper_neon_sqadd_u64_riscv32
#define helper_neon_sqadd_u8 helper_neon_sqadd_u8_riscv32
#define helper_neon_sub_u16 helper_neon_sub_u16_riscv32
#define helper_neon_sub_u8 helper_neon_sub_u8_riscv32
#define helper_neon_subl_u16 helper_neon_subl_u16_riscv32
#define helper_neon_subl_u32 helper_neon_subl_u32_riscv32
#define helper_neon_tbl helper_neon_tbl_riscv32
#define helper_neon_tst_u16 helper_neon_tst_u16_riscv32
#define helper_neon_tst_u32 helper_neon_tst_u32_riscv32
#define helper_neon_tst_u8 helper_neon_tst_u8_riscv32
#define helper_neon_unarrow_sat16 helper_neon_unarrow_sat16_riscv32
#define helper_neon_unarrow_sat32 helper_neon_unarrow_sat32_riscv32
#define helper_neon_unarrow_sat8 helper_neon_unarrow_sat8_riscv32
#define helper_neon_unzip16 helper_neon_unzip16_riscv32
#define helper_neon_unzip8 helper_neon_unzip8_riscv32
#define helper_neon_uqadd_s16 helper_neon_uqadd_s16_riscv32
#define helper_neon_uqadd_s32 helper_neon_uqadd_s32_riscv32
#define helper_neon_uqadd_s64 helper_neon_uqadd_s64_riscv32
#define helper_neon_uqadd_s8 helper_neon_uqadd_s8_riscv32
#define helper_neon_widen_s16 helper_neon_widen_s16_riscv32
#define helper_neon_widen_s8 helper_neon_widen_s8_riscv32
#define helper_neon_widen_u16 helper_neon_widen_u16_riscv32
#define helper_neon_widen_u8 helper_neon_widen_u8_riscv32
#define helper_neon_zip16 helper_neon_zip16_riscv32
#define helper_neon_zip8 helper_neon_zip8_riscv32
#define helper_power_down helper_power_down_riscv32
#define helper_pre_hvc helper_pre_hvc_riscv32
#define helper_pre_smc helper_pre_smc_riscv32
#define helper_qadd16 helper_qadd16_riscv32
#define helper_qadd8 helper_qadd8_riscv32
#define helper_qaddsubx helper_qaddsubx_riscv32
#define helper_qsub16 helper_qsub16_riscv32
#define helper_qsub8 helper_qsub8_riscv32
#define helper_qsubaddx helper_qsubaddx_riscv32
#define helper_raise_exception helper_raise_exception_riscv32
#define helper_rbit helper_rbit_riscv32
#define helper_recpe_f16 helper_recpe_f16_riscv32
#define helper_recpe_f32 helper_recpe_f32_riscv32
#define helper_recpe_f64 helper_recpe_f64_riscv32
#define helper_recpe_u32 helper_recpe_u32_riscv32
#define helper_recps_f32 helper_recps_f32_riscv32
#define helper_rem_i32 helper_rem_i32_riscv32
#define helper_rem_i64 helper_rem_i64_riscv32
#define helper_remu_i32 helper_remu_i32_riscv32
#define helper_remu_i64 helper_remu_i64_riscv32
#define helper_ret_ldb_cmmu helper_ret_ldb_cmmu_riscv32
#define helper_ret_ldsb_mmu helper_ret_ldsb_mmu_riscv32
#define helper_ret_ldub_mmu helper_ret_ldub_mmu_riscv32
#define helper_ret_stb_mmu helper_ret_stb_mmu_riscv32
#define helper_rintd helper_rintd_riscv32
#define helper_rintd_exact helper_rintd_exact_riscv32
#define helper_rints helper_rints_riscv32
#define helper_rints_exact helper_rints_exact_riscv32
#define helper_ror_cc helper_ror_cc_riscv32
#define helper_rsqrte_f16 helper_rsqrte_f16_riscv32
#define helper_rsqrte_f32 helper_rsqrte_f32_riscv32
#define helper_rsqrte_f64 helper_rsqrte_f64_riscv32
#define helper_rsqrte_u32 helper_rsqrte_u32_riscv32
#define helper_rsqrts_f32 helper_rsqrts_f32_riscv32
#define helper_sadd16 helper_sadd16_riscv32
#define helper_sadd8 helper_sadd8_riscv32
#define helper_saddsubx helper_saddsubx_riscv32
#define helper_sar_cc helper_sar_cc_riscv32
#define helper_sar_i32 helper_sar_i32_riscv32
#define helper_sar_i64 helper_sar_i64_riscv32
#define helper_sdiv helper_sdiv_riscv32
#define helper_sel_flags helper_sel_flags_riscv32
#define helper_set_cp_reg helper_set_cp_reg_riscv32
#define helper_set_cp_reg64 helper_set_cp_reg64_riscv32
#define helper_set_neon_rmode helper_set_neon_rmode_riscv32
#define helper_set_r13_banked helper_set_r13_banked_riscv32
#define helper_set_rmode helper_set_rmode_riscv32
#define helper_set_user_reg helper_set_user_reg_riscv32
#define helper_setend helper_setend_riscv32
#define helper_shadd16 helper_shadd16_riscv32
#define helper_shadd8 helper_shadd8_riscv32
#define helper_shaddsubx helper_shaddsubx_riscv32
#define helper_shl_cc helper_shl_cc_riscv32
#define helper_shl_i64 helper_shl_i64_riscv32
#define helper_shr_cc helper_shr_cc_riscv32
#define helper_shr_i32 helper_shr_i32_riscv32
#define helper_shr_i64 helper_shr_i64_riscv32
#define helper_shsub16 helper_shsub16_riscv32
#define helper_shsub8 helper_shsub8_riscv32
#define helper_shsubaddx helper_shsubaddx_riscv32
#define helper_ssat helper_ssat_riscv32
#define helper_ssat16 helper_ssat16_riscv32
#define helper_ssub16 helper_ssub16_riscv32
#define helper_ssub8 helper_ssub8_riscv32
#define helper_ssubaddx helper_ssubaddx_riscv32
#define helper_stb_mmu helper_stb_mmu_riscv32
#define helper_stl_mmu helper_stl_mmu_riscv32
#define helper_stq_mmu helper_stq_mmu_riscv32
#define helper_stw_mmu helper_stw_mmu_riscv32
#define helper_sub_saturate helper_sub_saturate_riscv32
#define helper_sub_usaturate helper_sub_usaturate_riscv32
#define helper_sxtb16 helper_sxtb16_riscv32
#define helper_uadd16 helper_uadd16_riscv32
#define helper_uadd8 helper_uadd8_riscv32
#define helper_uaddsubx helper_uaddsubx_riscv32
#define helper_udiv helper_udiv_riscv32
#define helper_uhadd16 helper_uhadd16_riscv32
#define helper_uhadd8 helper_uhadd8_riscv32
#define helper_uhaddsubx helper_uhaddsubx_riscv32
#define helper_uhsub16 helper_uhsub16_riscv32
#define helper_uhsub8 helper_uhsub8_riscv32
#define helper_uhsubaddx helper_uhsubaddx_riscv32
#define helper_uqadd16 helper_uqadd16_riscv32
#define helper_uqadd8 helper_uqadd8_riscv32
#define helper_uqaddsubx helper_uqaddsubx_riscv32
#define helper_uqsub16 helper_uqsub16_riscv32
#define helper_uqsub8 helper_uqsub8_riscv32
#define helper_uqsubaddx helper_uqsubaddx_riscv32
#define helper_usad8 helper_usad8_riscv32
#define helper_usat helper_usat_riscv32
#define helper_usat16 helper_usat16_riscv32
#define helper_usub16 helper_usub16_riscv32
#define helper_usub8 helper_usub8_riscv32
#define helper_usubaddx helper_usubaddx_riscv32
#define helper_uxtb16 helper_uxtb16_riscv32
#define helper_v7m_blxns helper_v7m_blxns_riscv32
#define helper_v7m_bxns helper_v7m_bxns_riscv32
#define helper_v7m_mrs helper_v7m_mrs_riscv32
#define helper_v7m_msr helper_v7m_msr_riscv32
#define helper_v7m_tt helper_v7m_tt_riscv32
#define helper_v8m_stackcheck helper_v8m_stackcheck_riscv32
#define helper_vfp_absd helper_vfp_absd_riscv32
#define helper_vfp_abss helper_vfp_abss_riscv32
#define helper_vfp_addd helper_vfp_addd_riscv32
#define helper_vfp_adds helper_vfp_adds_riscv32
#define helper_vfp_cmpd helper_vfp_cmpd_riscv32
#define helper_vfp_cmph_a64 helper_vfp_cmph_a64_riscv32
#define helper_vfp_cmped helper_vfp_cmped_riscv32
#define helper_vfp_cmpeh_a64 helper_vfp_cmpeh_a64_riscv32
#define helper_vfp_cmpes helper_vfp_cmpes_riscv32
#define helper_vfp_cmps helper_vfp_cmps_riscv32
#define helper_vfp_divd helper_vfp_divd_riscv32
#define helper_vfp_divs helper_vfp_divs_riscv32
#define helper_vfp_fcvt_f16_to_f32 helper_vfp_fcvt_f16_to_f32_riscv32
#define helper_vfp_fcvt_f16_to_f64 helper_vfp_fcvt_f16_to_f64_riscv32
#define helper_vfp_fcvt_f32_to_f16 helper_vfp_fcvt_f32_to_f16_riscv32
#define helper_vfp_fcvt_f64_to_f16 helper_vfp_fcvt_f64_to_f16_riscv32
#define helper_vfp_fcvtds helper_vfp_fcvtds_riscv32
#define helper_vfp_fcvtsd helper_vfp_fcvtsd_riscv32
#define helper_vfp_get_fpscr helper_vfp_get_fpscr_riscv32
#define helper_vfp_maxd helper_vfp_maxd_riscv32
#define helper_vfp_maxnumd helper_vfp_maxnumd_riscv32
#define helper_vfp_maxnums helper_vfp_maxnums_riscv32
#define helper_vfp_maxs helper_vfp_maxs_riscv32
#define helper_vfp_mind helper_vfp_mind_riscv32
#define helper_vfp_minnumd helper_vfp_minnumd_riscv32
#define helper_vfp_minnums helper_vfp_minnums_riscv32
#define helper_vfp_mins helper_vfp_mins_riscv32
#define helper_vfp_muladdd helper_vfp_muladdd_riscv32
#define helper_vfp_muladds helper_vfp_muladds_riscv32
#define helper_vfp_muld helper_vfp_muld_riscv32
#define helper_vfp_muls helper_vfp_muls_riscv32
#define helper_vfp_negd helper_vfp_negd_riscv32
#define helper_vfp_negs helper_vfp_negs_riscv32
#define helper_vfp_set_fpscr helper_vfp_set_fpscr_riscv32
#define helper_vfp_shtod helper_vfp_shtod_riscv32
#define helper_vfp_shtos helper_vfp_shtos_riscv32
#define helper_vfp_sitod helper_vfp_sitod_riscv32
#define helper_vfp_sitoh helper_vfp_sitoh_riscv32
#define helper_vfp_sitos helper_vfp_sitos_riscv32
#define helper_vfp_sltod helper_vfp_sltod_riscv32
#define helper_vfp_sltoh helper_vfp_sltoh_riscv32
#define helper_vfp_sltos helper_vfp_sltos_riscv32
#define helper_vfp_sqrtd helper_vfp_sqrtd_riscv32
#define helper_vfp_sqrts helper_vfp_sqrts_riscv32
#define helper_vfp_sqtod helper_vfp_sqtod_riscv32
#define helper_vfp_sqtoh helper_vfp_sqtoh_riscv32
#define helper_vfp_sqtos helper_vfp_sqtos_riscv32
#define helper_vfp_subd helper_vfp_subd_riscv32
#define helper_vfp_subs helper_vfp_subs_riscv32
#define helper_vfp_toshd helper_vfp_toshd_riscv32
#define helper_vfp_toshd_round_to_zero helper_vfp_toshd_round_to_zero_riscv32
#define helper_vfp_toshh helper_vfp_toshh_riscv32
#define helper_vfp_toshs helper_vfp_toshs_riscv32
#define helper_vfp_toshs_round_to_zero helper_vfp_toshs_round_to_zero_riscv32
#define helper_vfp_tosid helper_vfp_tosid_riscv32
#define helper_vfp_tosih helper_vfp_tosih_riscv32
#define helper_vfp_tosis helper_vfp_tosis_riscv32
#define helper_vfp_tosizd helper_vfp_tosizd_riscv32
#define helper_vfp_tosizh helper_vfp_tosizh_riscv32
#define helper_vfp_tosizs helper_vfp_tosizs_riscv32
#define helper_vfp_tosld helper_vfp_tosld_riscv32
#define helper_vfp_tosld_round_to_zero helper_vfp_tosld_round_to_zero_riscv32
#define helper_vfp_toslh helper_vfp_toslh_riscv32
#define helper_vfp_tosls helper_vfp_tosls_riscv32
#define helper_vfp_tosls_round_to_zero helper_vfp_tosls_round_to_zero_riscv32
#define helper_vfp_tosqd helper_vfp_tosqd_riscv32
#define helper_vfp_tosqh helper_vfp_tosqh_riscv32
#define helper_vfp_tosqs helper_vfp_tosqs_riscv32
#define helper_vfp_touhd helper_vfp_touhd_riscv32
#define helper_vfp_touhd_round_to_zero helper_vfp_touhd_round_to_zero_riscv32
#define helper_vfp_touhh helper_vfp_touhh_riscv32
#define helper_vfp_touhs helper_vfp_touhs_riscv32
#define helper_vfp_touhs_round_to_zero helper_vfp_touhs_round_to_zero_riscv32
#define helper_vfp_touid helper_vfp_touid_riscv32
#define helper_vfp_touih helper_vfp_touih_riscv32
#define helper_vfp_touis helper_vfp_touis_riscv32
#define helper_vfp_touizd helper_vfp_touizd_riscv32
#define helper_vfp_touizh helper_vfp_touizh_riscv32
#define helper_vfp_touizs helper_vfp_touizs_riscv32
#define helper_vfp_tould helper_vfp_tould_riscv32
#define helper_vfp_tould_round_to_zero helper_vfp_tould_round_to_zero_riscv32
#define helper_vfp_toulh helper_vfp_toulh_riscv32
#define helper_vfp_touls helper_vfp_touls_riscv32
#define helper_vfp_touls_round_to_zero helper_vfp_touls_round_to_zero_riscv32
#define helper_vfp_touqd helper_vfp_touqd_riscv32
#define helper_vfp_touqh helper_vfp_touqh_riscv32
#define helper_vfp_touqs helper_vfp_touqs_riscv32
#define helper_vfp_uhtod helper_vfp_uhtod_riscv32
#define helper_vfp_uhtos helper_vfp_uhtos_riscv32
#define helper_vfp_uitod helper_vfp_uitod_riscv32
#define helper_vfp_uitoh helper_vfp_uitoh_riscv32
#define helper_vfp_uitos helper_vfp_uitos_riscv32
#define helper_vfp_ultod helper_vfp_ultod_riscv32
#define helper_vfp_ultoh helper_vfp_ultoh_riscv32
#define helper_vfp_ultos helper_vfp_ultos_riscv32
#define helper_vfp_uqtod helper_vfp_uqtod_riscv32
#define helper_vfp_uqtoh helper_vfp_uqtoh_riscv32
#define helper_vfp_uqtos helper_vfp_uqtos_riscv32
#define helper_wfe helper_wfe_riscv32
#define helper_wfi helper_wfi_riscv32
#define helper_yield helper_yield_riscv32
#define hex2decimal hex2decimal_riscv32
#define hw_breakpoint_update hw_breakpoint_update_riscv32
#define hw_breakpoint_update_all hw_breakpoint_update_all_riscv32
#define hw_watchpoint_update hw_watchpoint_update_riscv32
#define hw_watchpoint_update_all hw_watchpoint_update_all_riscv32
#define init_cpreg_list init_cpreg_list_riscv32
#define init_lists init_lists_riscv32
#define input_type_enum input_type_enum_riscv32
#define int128_2_64 int128_2_64_riscv32
#define int128_add int128_add_riscv32
#define int128_addto int128_addto_riscv32
#define int128_and int128_and_riscv32
#define int128_eq int128_eq_riscv32
#define int128_ge int128_ge_riscv32
#define int128_get64 int128_get64_riscv32
#define int128_gt int128_gt_riscv32
#define int128_le int128_le_riscv32
#define int128_lt int128_lt_riscv32
#define int128_make64 int128_make64_riscv32
#define int128_max int128_max_riscv32
#define int128_min int128_min_riscv32
#define int128_ne int128_ne_riscv32
#define int128_neg int128_neg_riscv32
#define int128_nz int128_nz_riscv32
#define int128_rshift int128_rshift_riscv32
#define int128_sub int128_sub_riscv32
#define int128_subfrom int128_subfrom_riscv32
#define int128_zero int128_zero_riscv32
#define int16_to_float16 int16_to_float16_riscv32
#define int16_to_float16_scalbn int16_to_float16_scalbn_riscv32
#define int16_to_float32 int16_to_float32_riscv32
#define int16_to_float32_scalbn int16_to_float32_scalbn_riscv32
#define int16_to_float64 int16_to_float64_riscv32
#define int16_to_float64_scalbn int16_to_float64_scalbn_riscv32
#define int32_to_float128 int32_to_float128_riscv32
#define int32_to_float16 int32_to_float16_riscv32
#define int32_to_float16_scalbn int32_to_float16_scalbn_riscv32
#define int32_to_float32 int32_to_float32_riscv32
#define int32_to_float32_scalbn int32_to_float32_scalbn_riscv32
#define int32_to_float64 int32_to_float64_riscv32
#define int32_to_float64_scalbn int32_to_float64_scalbn_riscv32
#define int32_to_floatx80 int32_to_floatx80_riscv32
#define int64_to_float128 int64_to_float128_riscv32
#define int64_to_float16 int64_to_float16_riscv32
#define int64_to_float16_scalbn int64_to_float16_scalbn_riscv32
#define int64_to_float32 int64_to_float32_riscv32
#define int64_to_float32_scalbn int64_to_float32_scalbn_riscv32
#define int64_to_float64 int64_to_float64_riscv32
#define int64_to_float64_scalbn int64_to_float64_scalbn_riscv32
#define int64_to_floatx80 int64_to_floatx80_riscv32
#define invalidate_and_set_dirty invalidate_and_set_dirty_riscv32
#define invalidate_page_bitmap invalidate_page_bitmap_riscv32
#define io_readb io_readb_riscv32
#define io_readl io_readl_riscv32
#define io_readq io_readq_riscv32
#define io_readw io_readw_riscv32
#define io_writeb io_writeb_riscv32
#define io_writel io_writel_riscv32
#define io_writeq io_writeq_riscv32
#define io_writew io_writew_riscv32
#define iotlb_to_section iotlb_to_section_riscv32
#define is_a64 is_a64_riscv32
#define is_help_option is_help_option_riscv32
#define is_valid_option_list is_valid_option_list_riscv32
#define isr_read isr_read_riscv32
#define iwmmxt_load_creg iwmmxt_load_creg_riscv32
#define iwmmxt_load_reg iwmmxt_load_reg_riscv32
#define iwmmxt_store_creg iwmmxt_store_creg_riscv32
#define iwmmxt_store_reg iwmmxt_store_reg_riscv32
#define kvm_to_cpreg_id kvm_to_cpreg_id_riscv32
#define last_ram_offset last_ram_offset_riscv32
#define ldl_be_p ldl_be_p_riscv32
#define ldl_be_phys ldl_be_phys_riscv32
#define ldl_be_phys_cached ldl_be_phys_cached_riscv32
#define ldl_he_p ldl_he_p_riscv32
#define ldl_le_p ldl_le_p_riscv32
#define ldl_le_phys ldl_le_phys_riscv32
#define ldl_le_phys_cached ldl_le_phys_cached_riscv32
#define ldl_phys ldl_phys_riscv32
#define ldl_phys_cached ldl_phys_cached_riscv32
#define ldl_phys_internal ldl_phys_internal_riscv32
#define ldq_be_p ldq_be_p_riscv32
#define ldq_be_phys ldq_be_phys_riscv32
#define ldq_be_phys_cached ldq_be_phys_cached_riscv32
#define ldq_he_p ldq_he_p_riscv32
#define ldq_le_p ldq_le_p_riscv32
#define ldq_le_phys ldq_le_phys_riscv32
#define ldq_le_phys_cached ldq_le_phys_cached_riscv32
#define ldq_phys ldq_phys_riscv32
#define ldq_phys_cached ldq_phys_cached_riscv32
#define ldq_phys_internal ldq_phys_internal_riscv32
#define ldst_name ldst_name_riscv32
#define ldub_p ldub_p_riscv32
#define ldub_phys ldub_phys_riscv32
#define ldub_phys_cached ldub_phys_cached_riscv32
#define lduw_be_p lduw_be_p_riscv32
#define lduw_be_phys lduw_be_phys_riscv32
#define lduw_be_phys_cached lduw_be_phys_cached_riscv32
#define lduw_he_p lduw_he_p_riscv32
#define lduw_le_p lduw_le_p_riscv32
#define lduw_le_phys lduw_le_phys_riscv32
#define lduw_le_phys_cached lduw_le_phys_cached_riscv32
#define lduw_phys lduw_phys_riscv32
#define lduw_phys_cached lduw_phys_cached_riscv32
#define lduw_phys_internal lduw_phys_internal_riscv32
#define le128 le128_riscv32
#define linked_bp_matches linked_bp_matches_riscv32
#define listener_add_address_space listener_add_address_space_riscv32
#define load_cpu_offset load_cpu_offset_riscv32
#define load_reg load_reg_riscv32
#define load_reg_var load_reg_var_riscv32
#define log_cpu_state log_cpu_state_riscv32
#define lpae_cp_reginfo lpae_cp_reginfo_riscv32
#define lt128 lt128_riscv32
#define machine_class_init machine_class_init_riscv32
#define machine_finalize machine_finalize_riscv32
#define machine_info machine_info_riscv32
#define machine_initfn machine_initfn_riscv32
#define machine_register_types machine_register_types_riscv32
#define machvirt_init machvirt_init_riscv32
#define machvirt_machine_init machvirt_machine_init_riscv32
#define maj maj_riscv32
#define mapping_conflict mapping_conflict_riscv32
#define mapping_contiguous mapping_contiguous_riscv32
#define mapping_have_same_region mapping_have_same_region_riscv32
#define mapping_merge mapping_merge_riscv32
#define memory_access_size memory_access_size_riscv32
#define memory_free memory_free_riscv32
#define memory_init memory_init_riscv32
#define memory_listener_match memory_listener_match_riscv32
#define memory_listener_register memory_listener_register_riscv32
#define memory_listener_unregister memory_listener_unregister_riscv32
#define memory_map memory_map_riscv32
#define memory_map_init memory_map_init_riscv32
#define memory_map_ptr memory_map_ptr_riscv32
#define memory_mapping_filter memory_mapping_filter_riscv32
#define memory_mapping_list_add_mapping_sorted memory_mapping_list_add_mapping_sorted_riscv32
#define memory_mapping_list_add_merge_sorted memory_mapping_list_add_merge_sorted_riscv32
#define memory_mapping_list_free memory_mapping_list_free_riscv32
#define memory_mapping_list_init memory_mapping_list_init_riscv32
#define memory_region_access_valid memory_region_access_valid_riscv32
#define memory_region_add_subregion memory_region_add_subregion_riscv32
#define memory_region_add_subregion_common memory_region_add_subregion_common_riscv32
#define memory_region_add_subregion_overlap memory_region_add_subregion_overlap_riscv32
#define memory_region_big_endian memory_region_big_endian_riscv32
#define memory_region_clear_global_locking memory_region_clear_global_locking_riscv32
#define memory_region_clear_pending memory_region_clear_pending_riscv32
#define memory_region_del_subregion memory_region_del_subregion_riscv32
#define memory_region_destructor_alias memory_region_destructor_alias_riscv32
#define memory_region_destructor_none memory_region_destructor_none_riscv32
#define memory_region_destructor_ram memory_region_destructor_ram_riscv32
#define memory_region_destructor_ram_from_ptr memory_region_destructor_ram_from_ptr_riscv32
#define memory_region_dispatch_read memory_region_dispatch_read_riscv32
#define memory_region_dispatch_read1 memory_region_dispatch_read1_riscv32
#define memory_region_dispatch_write memory_region_dispatch_write_riscv32
#define memory_region_escape_name memory_region_escape_name_riscv32
#define memory_region_finalize memory_region_finalize_riscv32
#define memory_region_find memory_region_find_riscv32
#define memory_region_from_host memory_region_from_host_riscv32
#define memory_region_get_addr memory_region_get_addr_riscv32
#define memory_region_get_alignment memory_region_get_alignment_riscv32
#define memory_region_get_container memory_region_get_container_riscv32
#define memory_region_get_dirty_log_mask memory_region_get_dirty_log_mask_riscv32
#define memory_region_get_fd memory_region_get_fd_riscv32
#define memory_region_get_may_overlap memory_region_get_may_overlap_riscv32
#define memory_region_get_priority memory_region_get_priority_riscv32
#define memory_region_get_ram_addr memory_region_get_ram_addr_riscv32
#define memory_region_get_ram_ptr memory_region_get_ram_ptr_riscv32
#define memory_region_get_size memory_region_get_size_riscv32
#define memory_region_info memory_region_info_riscv32
#define memory_region_init memory_region_init_riscv32
#define memory_region_init_alias memory_region_init_alias_riscv32
#define memory_region_init_io memory_region_init_io_riscv32
#define memory_region_init_ram_device_ptr memory_region_init_ram_device_ptr_riscv32
#define memory_region_init_ram_nomigrate memory_region_init_ram_nomigrate_riscv32
#define memory_region_init_ram_ptr memory_region_init_ram_ptr_riscv32
#define memory_region_init_reservation memory_region_init_reservation_riscv32
#define memory_region_init_resizeable_ram memory_region_init_resizeable_ram_riscv32
#define memory_region_init_rom_nomigrate memory_region_init_rom_nomigrate_riscv32
#define memory_region_initfn memory_region_initfn_riscv32
#define memory_region_is_logging memory_region_is_logging_riscv32
#define memory_region_is_mapped memory_region_is_mapped_riscv32
#define memory_region_is_ram_device memory_region_is_ram_device_riscv32
#define memory_region_is_unassigned memory_region_is_unassigned_riscv32
#define memory_region_name memory_region_name_riscv32
#define memory_region_need_escape memory_region_need_escape_riscv32
#define memory_region_oldmmio_read_accessor memory_region_oldmmio_read_accessor_riscv32
#define memory_region_oldmmio_write_accessor memory_region_oldmmio_write_accessor_riscv32
#define memory_region_present memory_region_present_riscv32
#define memory_region_read_accessor memory_region_read_accessor_riscv32
#define memory_region_readd_subregion memory_region_readd_subregion_riscv32
#define memory_region_ref memory_region_ref_riscv32
#define memory_region_resolve_container memory_region_resolve_container_riscv32
#define memory_region_rom_device_set_romd memory_region_rom_device_set_romd_riscv32
#define memory_region_section_get_iotlb memory_region_section_get_iotlb_riscv32
#define memory_region_set_address memory_region_set_address_riscv32
#define memory_region_set_alias_offset memory_region_set_alias_offset_riscv32
#define memory_region_set_enabled memory_region_set_enabled_riscv32
#define memory_region_set_nonvolatile memory_region_set_nonvolatile_riscv32
#define memory_region_set_readonly memory_region_set_readonly_riscv32
#define memory_region_set_size memory_region_set_size_riscv32
#define memory_region_size memory_region_size_riscv32
#define memory_region_to_address_space memory_region_to_address_space_riscv32
#define memory_region_transaction_begin memory_region_transaction_begin_riscv32
#define memory_region_transaction_commit memory_region_transaction_commit_riscv32
#define memory_region_unref memory_region_unref_riscv32
#define memory_region_update_container_subregions memory_region_update_container_subregions_riscv32
#define memory_region_write_accessor memory_region_write_accessor_riscv32
#define memory_region_wrong_endianness memory_region_wrong_endianness_riscv32
#define memory_register_types memory_register_types_riscv32
#define memory_try_enable_merging memory_try_enable_merging_riscv32
#define memory_unmap memory_unmap_riscv32
#define modify_arm_cp_regs modify_arm_cp_regs_riscv32
#define module_call_init module_call_init_riscv32
#define module_load module_load_riscv32
#define mpidr_cp_reginfo mpidr_cp_reginfo_riscv32
#define mpidr_read mpidr_read_riscv32
#define msr_mask msr_mask_riscv32
#define mul128By64To192 mul128By64To192_riscv32
#define mul128To256 mul128To256_riscv32
#define mul64To128 mul64To128_riscv32
#define muldiv64 muldiv64_riscv32
#define neon_2rm_is_float_op neon_2rm_is_float_op_riscv32
#define neon_2rm_sizes neon_2rm_sizes_riscv32
#define neon_3r_sizes neon_3r_sizes_riscv32
#define neon_get_scalar neon_get_scalar_riscv32
#define neon_load_reg neon_load_reg_riscv32
#define neon_load_reg64 neon_load_reg64_riscv32
#define neon_load_scratch neon_load_scratch_riscv32
#define neon_ls_element_type neon_ls_element_type_riscv32
#define neon_reg_offset neon_reg_offset_riscv32
#define neon_store_reg neon_store_reg_riscv32
#define neon_store_reg64 neon_store_reg64_riscv32
#define neon_store_scratch neon_store_scratch_riscv32
#define new_ldst_label new_ldst_label_riscv32
#define next_list next_list_riscv32
#define normalizeFloat128Subnormal normalizeFloat128Subnormal_riscv32
#define normalizeFloat16Subnormal normalizeFloat16Subnormal_riscv32
#define normalizeFloat32Subnormal normalizeFloat32Subnormal_riscv32
#define normalizeFloat64Subnormal normalizeFloat64Subnormal_riscv32
#define normalizeFloatx80Subnormal normalizeFloatx80Subnormal_riscv32
#define normalizeRoundAndPackFloat128 normalizeRoundAndPackFloat128_riscv32
#define normalizeRoundAndPackFloat32 normalizeRoundAndPackFloat32_riscv32
#define normalizeRoundAndPackFloat64 normalizeRoundAndPackFloat64_riscv32
#define normalizeRoundAndPackFloatx80 normalizeRoundAndPackFloatx80_riscv32
#define not_v6_cp_reginfo not_v6_cp_reginfo_riscv32
#define not_v7_cp_reginfo not_v7_cp_reginfo_riscv32
#define not_v8_cp_reginfo not_v8_cp_reginfo_riscv32
#define object_child_foreach object_child_foreach_riscv32
#define object_child_foreach_recursive object_child_foreach_recursive_riscv32
#define object_class_foreach object_class_foreach_riscv32
#define object_class_foreach_tramp object_class_foreach_tramp_riscv32
#define object_class_get_list object_class_get_list_riscv32
#define object_class_get_list_sorted object_class_get_list_sorted_riscv32
#define object_class_get_list_tramp object_class_get_list_tramp_riscv32
#define object_class_get_parent object_class_get_parent_riscv32
#define object_deinit object_deinit_riscv32
#define object_dynamic_cast object_dynamic_cast_riscv32
#define object_finalize object_finalize_riscv32
#define object_finalize_child_property object_finalize_child_property_riscv32
#define object_get_child_property object_get_child_property_riscv32
#define object_get_internal_root object_get_internal_root_riscv32
#define object_get_link_property object_get_link_property_riscv32
#define object_get_root object_get_root_riscv32
#define object_init_with_type object_init_with_type_riscv32
#define object_initialize_with_type object_initialize_with_type_riscv32
#define object_instance_init object_instance_init_riscv32
#define object_new_with_type object_new_with_type_riscv32
#define object_post_init_with_type object_post_init_with_type_riscv32
#define object_property_add_alias object_property_add_alias_riscv32
#define object_property_add_link object_property_add_link_riscv32
#define object_property_add_uint16_ptr object_property_add_uint16_ptr_riscv32
#define object_property_add_uint32_ptr object_property_add_uint32_ptr_riscv32
#define object_property_add_uint64_ptr object_property_add_uint64_ptr_riscv32
#define object_property_add_uint8_ptr object_property_add_uint8_ptr_riscv32
#define object_property_allow_set_link object_property_allow_set_link_riscv32
#define object_property_del object_property_del_riscv32
#define object_property_del_all object_property_del_all_riscv32
#define object_property_find object_property_find_riscv32
#define object_property_get object_property_get_riscv32
#define object_property_get_bool object_property_get_bool_riscv32
#define object_property_get_int object_property_get_int_riscv32
#define object_property_get_link object_property_get_link_riscv32
#define object_property_get_qobject object_property_get_qobject_riscv32
#define object_property_get_str object_property_get_str_riscv32
#define object_property_get_type object_property_get_type_riscv32
#define object_property_is_child object_property_is_child_riscv32
#define object_property_set object_property_set_riscv32
#define object_property_set_description object_property_set_description_riscv32
#define object_property_set_link object_property_set_link_riscv32
#define object_property_set_qobject object_property_set_qobject_riscv32
#define object_release_link_property object_release_link_property_riscv32
#define object_resolve_abs_path object_resolve_abs_path_riscv32
#define object_resolve_child_property object_resolve_child_property_riscv32
#define object_resolve_link object_resolve_link_riscv32
#define object_resolve_link_property object_resolve_link_property_riscv32
#define object_resolve_partial_path object_resolve_partial_path_riscv32
#define object_resolve_path object_resolve_path_riscv32
#define object_resolve_path_component object_resolve_path_component_riscv32
#define object_resolve_path_type object_resolve_path_type_riscv32
#define object_set_link_property object_set_link_property_riscv32
#define object_type_get_instance_size object_type_get_instance_size_riscv32
#define omap_cachemaint_write omap_cachemaint_write_riscv32
#define omap_cp_reginfo omap_cp_reginfo_riscv32
#define omap_threadid_write omap_threadid_write_riscv32
#define omap_ticonfig_write omap_ticonfig_write_riscv32
#define omap_wfi_write omap_wfi_write_riscv32
#define op_bits op_bits_riscv32
#define op_to_mov op_to_mov_riscv32
#define op_to_movi op_to_movi_riscv32
#define open_modeflags open_modeflags_riscv32
#define output_type_enum output_type_enum_riscv32
#define packFloat128 packFloat128_riscv32
#define packFloat16 packFloat16_riscv32
#define packFloat32 packFloat32_riscv32
#define packFloat64 packFloat64_riscv32
#define packFloatx80 packFloatx80_riscv32
#define page_find page_find_riscv32
#define page_find_alloc page_find_alloc_riscv32
#define page_flush_tb page_flush_tb_riscv32
#define page_flush_tb_1 page_flush_tb_1_riscv32
#define page_init page_init_riscv32
#define page_size_init page_size_init_riscv32
#define par_write par_write_riscv32
#define parse_array parse_array_riscv32
#define parse_cpu_model parse_cpu_model_riscv32
#define parse_error parse_error_riscv32
#define parse_escape parse_escape_riscv32
#define parse_keyword parse_keyword_riscv32
#define parse_literal parse_literal_riscv32
#define parse_object parse_object_riscv32
#define parse_option_bool parse_option_bool_riscv32
#define parse_option_number parse_option_number_riscv32
#define parse_option_size parse_option_size_riscv32
#define parse_optional parse_optional_riscv32
#define parse_pair parse_pair_riscv32
#define parse_str parse_str_riscv32
#define parse_type_bool parse_type_bool_riscv32
#define parse_type_int parse_type_int_riscv32
#define parse_type_number parse_type_number_riscv32
#define parse_type_size parse_type_size_riscv32
#define parse_type_str parse_type_str_riscv32
#define parse_value parse_value_riscv32
#define parser_context_free parser_context_free_riscv32
#define parser_context_new parser_context_new_riscv32
#define parser_context_peek_token parser_context_peek_token_riscv32
#define parser_context_pop_token parser_context_pop_token_riscv32
#define parser_context_restore parser_context_restore_riscv32
#define parser_context_save parser_context_save_riscv32
#define patch_reloc patch_reloc_riscv32
#define phys_map_node_alloc phys_map_node_alloc_riscv32
#define phys_map_node_reserve phys_map_node_reserve_riscv32
#define phys_mem_alloc phys_mem_alloc_riscv32
#define phys_mem_set_alloc phys_mem_set_alloc_riscv32
#define phys_page_compact phys_page_compact_riscv32
#define phys_page_compact_all phys_page_compact_all_riscv32
#define phys_page_find phys_page_find_riscv32
#define phys_page_set phys_page_set_riscv32
#define phys_page_set_level phys_page_set_level_riscv32
#define phys_section_add phys_section_add_riscv32
#define phys_section_destroy phys_section_destroy_riscv32
#define phys_sections_free phys_sections_free_riscv32
#define pickNaN pickNaN_riscv32
#define pickNaNMulAdd pickNaNMulAdd_riscv32
#define pmccfiltr_write pmccfiltr_write_riscv32
#define pmccntr_read pmccntr_read_riscv32
#define pmccntr_write pmccntr_write_riscv32
#define pmccntr_write32 pmccntr_write32_riscv32
#define pmcntenclr_write pmcntenclr_write_riscv32
#define pmcntenset_write pmcntenset_write_riscv32
#define pmcr_write pmcr_write_riscv32
#define pmintenclr_write pmintenclr_write_riscv32
#define pmintenset_write pmintenset_write_riscv32
#define pmovsr_write pmovsr_write_riscv32
#define pmreg_access pmreg_access_riscv32
#define pmsav5_cp_reginfo pmsav5_cp_reginfo_riscv32
#define pmsav5_data_ap_read pmsav5_data_ap_read_riscv32
#define pmsav5_data_ap_write pmsav5_data_ap_write_riscv32
#define pmsav5_insn_ap_read pmsav5_insn_ap_read_riscv32
#define pmsav5_insn_ap_write pmsav5_insn_ap_write_riscv32
#define pmuserenr_write pmuserenr_write_riscv32
#define pmxevtyper_write pmxevtyper_write_riscv32
#define ppc_tb_set_jmp_target ppc_tb_set_jmp_target_riscv32
#define print_type_bool print_type_bool_riscv32
#define print_type_int print_type_int_riscv32
#define print_type_number print_type_number_riscv32
#define print_type_size print_type_size_riscv32
#define print_type_str print_type_str_riscv32
#define probe_write probe_write_riscv32
#define propagateFloat128NaN propagateFloat128NaN_riscv32
#define propagateFloat32MulAddNaN propagateFloat32MulAddNaN_riscv32
#define propagateFloat32NaN propagateFloat32NaN_riscv32
#define propagateFloat64MulAddNaN propagateFloat64MulAddNaN_riscv32
#define propagateFloat64NaN propagateFloat64NaN_riscv32
#define propagateFloatx80NaN propagateFloatx80NaN_riscv32
#define property_get_alias property_get_alias_riscv32
#define property_get_bool property_get_bool_riscv32
#define property_get_str property_get_str_riscv32
#define property_get_uint16_ptr property_get_uint16_ptr_riscv32
#define property_get_uint32_ptr property_get_uint32_ptr_riscv32
#define property_get_uint64_ptr property_get_uint64_ptr_riscv32
#define property_get_uint8_ptr property_get_uint8_ptr_riscv32
#define property_release_alias property_release_alias_riscv32
#define property_release_bool property_release_bool_riscv32
#define property_release_str property_release_str_riscv32
#define property_resolve_alias property_resolve_alias_riscv32
#define property_set_alias property_set_alias_riscv32
#define property_set_bool property_set_bool_riscv32
#define property_set_str property_set_str_riscv32
#define pstate_read pstate_read_riscv32
#define pstate_write pstate_write_riscv32
#define pxa250_initfn pxa250_initfn_riscv32
#define pxa255_initfn pxa255_initfn_riscv32
#define pxa260_initfn pxa260_initfn_riscv32
#define pxa261_initfn pxa261_initfn_riscv32
#define pxa262_initfn pxa262_initfn_riscv32
#define pxa270a0_initfn pxa270a0_initfn_riscv32
#define pxa270a1_initfn pxa270a1_initfn_riscv32
#define pxa270b0_initfn pxa270b0_initfn_riscv32
#define pxa270b1_initfn pxa270b1_initfn_riscv32
#define pxa270c0_initfn pxa270c0_initfn_riscv32
#define pxa270c5_initfn pxa270c5_initfn_riscv32
#define qapi_dealloc_end_implicit_struct qapi_dealloc_end_implicit_struct_riscv32
#define qapi_dealloc_end_list qapi_dealloc_end_list_riscv32
#define qapi_dealloc_end_struct qapi_dealloc_end_struct_riscv32
#define qapi_dealloc_get_visitor qapi_dealloc_get_visitor_riscv32
#define qapi_dealloc_next_list qapi_dealloc_next_list_riscv32
#define qapi_dealloc_pop qapi_dealloc_pop_riscv32
#define qapi_dealloc_push qapi_dealloc_push_riscv32
#define qapi_dealloc_start_implicit_struct qapi_dealloc_start_implicit_struct_riscv32
#define qapi_dealloc_start_list qapi_dealloc_start_list_riscv32
#define qapi_dealloc_start_struct qapi_dealloc_start_struct_riscv32
#define qapi_dealloc_start_union qapi_dealloc_start_union_riscv32
#define qapi_dealloc_type_bool qapi_dealloc_type_bool_riscv32
#define qapi_dealloc_type_enum qapi_dealloc_type_enum_riscv32
#define qapi_dealloc_type_int qapi_dealloc_type_int_riscv32
#define qapi_dealloc_type_number qapi_dealloc_type_number_riscv32
#define qapi_dealloc_type_size qapi_dealloc_type_size_riscv32
#define qapi_dealloc_type_str qapi_dealloc_type_str_riscv32
#define qapi_dealloc_visitor_cleanup qapi_dealloc_visitor_cleanup_riscv32
#define qapi_dealloc_visitor_new qapi_dealloc_visitor_new_riscv32
#define qapi_free_ErrorClassList qapi_free_ErrorClassList_riscv32
#define qapi_free_X86CPUFeatureWordInfo qapi_free_X86CPUFeatureWordInfo_riscv32
#define qapi_free_X86CPUFeatureWordInfoList qapi_free_X86CPUFeatureWordInfoList_riscv32
#define qapi_free_X86CPURegister32List qapi_free_X86CPURegister32List_riscv32
#define qapi_free_boolList qapi_free_boolList_riscv32
#define qapi_free_int16List qapi_free_int16List_riscv32
#define qapi_free_int32List qapi_free_int32List_riscv32
#define qapi_free_int64List qapi_free_int64List_riscv32
#define qapi_free_int8List qapi_free_int8List_riscv32
#define qapi_free_intList qapi_free_intList_riscv32
#define qapi_free_numberList qapi_free_numberList_riscv32
#define qapi_free_strList qapi_free_strList_riscv32
#define qapi_free_uint16List qapi_free_uint16List_riscv32
#define qapi_free_uint32List qapi_free_uint32List_riscv32
#define qapi_free_uint64List qapi_free_uint64List_riscv32
#define qapi_free_uint8List qapi_free_uint8List_riscv32
#define qbool_destroy_obj qbool_destroy_obj_riscv32
#define qbool_from_int qbool_from_int_riscv32
#define qbool_get_int qbool_get_int_riscv32
#define qbool_type qbool_type_riscv32
#define qbus_create qbus_create_riscv32
#define qbus_create_inplace qbus_create_inplace_riscv32
#define qbus_finalize qbus_finalize_riscv32
#define qbus_initfn qbus_initfn_riscv32
#define qbus_realize qbus_realize_riscv32
#define qdev_create qdev_create_riscv32
#define qdev_get_type qdev_get_type_riscv32
#define qdev_register_types qdev_register_types_riscv32
#define qdev_set_parent_bus qdev_set_parent_bus_riscv32
#define qdev_try_create qdev_try_create_riscv32
#define qdict_add_key qdict_add_key_riscv32
#define qdict_array_split qdict_array_split_riscv32
#define qdict_clone_shallow qdict_clone_shallow_riscv32
#define qdict_del qdict_del_riscv32
#define qdict_destroy_obj qdict_destroy_obj_riscv32
#define qdict_entry_key qdict_entry_key_riscv32
#define qdict_entry_value qdict_entry_value_riscv32
#define qdict_extract_subqdict qdict_extract_subqdict_riscv32
#define qdict_find qdict_find_riscv32
#define qdict_first qdict_first_riscv32
#define qdict_flatten qdict_flatten_riscv32
#define qdict_flatten_qdict qdict_flatten_qdict_riscv32
#define qdict_flatten_qlist qdict_flatten_qlist_riscv32
#define qdict_get qdict_get_riscv32
#define qdict_get_bool qdict_get_bool_riscv32
#define qdict_get_double qdict_get_double_riscv32
#define qdict_get_int qdict_get_int_riscv32
#define qdict_get_obj qdict_get_obj_riscv32
#define qdict_get_qdict qdict_get_qdict_riscv32
#define qdict_get_qlist qdict_get_qlist_riscv32
#define qdict_get_str qdict_get_str_riscv32
#define qdict_get_try_bool qdict_get_try_bool_riscv32
#define qdict_get_try_int qdict_get_try_int_riscv32
#define qdict_get_try_str qdict_get_try_str_riscv32
#define qdict_has_prefixed_entries qdict_has_prefixed_entries_riscv32
#define qdict_haskey qdict_haskey_riscv32
#define qdict_iter qdict_iter_riscv32
#define qdict_join qdict_join_riscv32
#define qdict_new qdict_new_riscv32
#define qdict_next qdict_next_riscv32
#define qdict_next_entry qdict_next_entry_riscv32
#define qdict_put_bool qdict_put_bool_riscv32
#define qdict_put_int qdict_put_int_riscv32
#define qdict_put_null qdict_put_null_riscv32
#define qdict_put_obj qdict_put_obj_riscv32
#define qdict_put_str qdict_put_str_riscv32
#define qdict_rename_keys qdict_rename_keys_riscv32
#define qdict_size qdict_size_riscv32
#define qdict_type qdict_type_riscv32
#define qemu_clock_get_us qemu_clock_get_us_riscv32
#define qemu_clock_ptr qemu_clock_ptr_riscv32
#define qemu_clocks qemu_clocks_riscv32
#define qemu_get_cpu qemu_get_cpu_riscv32
#define qemu_get_guest_memory_mapping qemu_get_guest_memory_mapping_riscv32
#define qemu_get_guest_simple_memory_mapping qemu_get_guest_simple_memory_mapping_riscv32
#define qemu_get_ram_block qemu_get_ram_block_riscv32
#define qemu_host_page_mask qemu_host_page_mask_riscv32
#define qemu_host_page_size qemu_host_page_size_riscv32
#define qemu_init_vcpu qemu_init_vcpu_riscv32
#define qemu_ld_helpers qemu_ld_helpers_riscv32
#define qemu_log_enabled qemu_log_enabled_riscv32
#define qemu_log_vprintf qemu_log_vprintf_riscv32
#define qemu_loglevel_mask qemu_loglevel_mask_riscv32
#define qemu_map_ram_ptr qemu_map_ram_ptr_riscv32
#define qemu_oom_check qemu_oom_check_riscv32
#define qemu_parse_fd qemu_parse_fd_riscv32
#define qemu_ram_addr_from_host qemu_ram_addr_from_host_riscv32
#define qemu_ram_addr_from_host_nofail qemu_ram_addr_from_host_nofail_riscv32
#define qemu_ram_alloc qemu_ram_alloc_riscv32
#define qemu_ram_alloc_from_ptr qemu_ram_alloc_from_ptr_riscv32
#define qemu_ram_alloc_resizeable qemu_ram_alloc_resizeable_riscv32
#define qemu_ram_block_by_name qemu_ram_block_by_name_riscv32
#define qemu_ram_block_from_host qemu_ram_block_from_host_riscv32
#define qemu_ram_foreach_block qemu_ram_foreach_block_riscv32
#define qemu_ram_free qemu_ram_free_riscv32
#define qemu_ram_get_idstr qemu_ram_get_idstr_riscv32
#define qemu_ram_is_shared qemu_ram_is_shared_riscv32
#define qemu_ram_ptr_length qemu_ram_ptr_length_riscv32
#define qemu_ram_remap qemu_ram_remap_riscv32
#define qemu_ram_resize qemu_ram_resize_riscv32
#define qemu_ram_setup_dump qemu_ram_setup_dump_riscv32
#define qemu_ram_unset_idstr qemu_ram_unset_idstr_riscv32
#define qemu_st_helpers qemu_st_helpers_riscv32
#define qemu_strnlen qemu_strnlen_riscv32
#define qemu_strsep qemu_strsep_riscv32
#define qemu_tcg_configure qemu_tcg_configure_riscv32
#define qemu_tcg_init_vcpu qemu_tcg_init_vcpu_riscv32
#define qemu_try_memalign qemu_try_memalign_riscv32
#define qentry_destroy qentry_destroy_riscv32
#define qerror_human qerror_human_riscv32
#define qerror_report qerror_report_riscv32
#define qerror_report_err qerror_report_err_riscv32
#define qfloat_destroy_obj qfloat_destroy_obj_riscv32
#define qfloat_from_double qfloat_from_double_riscv32
#define qfloat_get_double qfloat_get_double_riscv32
#define qfloat_type qfloat_type_riscv32
#define qint_destroy_obj qint_destroy_obj_riscv32
#define qint_from_int qint_from_int_riscv32
#define qint_get_int qint_get_int_riscv32
#define qint_type qint_type_riscv32
#define qlist_append_bool qlist_append_bool_riscv32
#define qlist_append_int qlist_append_int_riscv32
#define qlist_append_null qlist_append_null_riscv32
#define qlist_append_obj qlist_append_obj_riscv32
#define qlist_append_str qlist_append_str_riscv32
#define qlist_copy qlist_copy_riscv32
#define qlist_copy_elem qlist_copy_elem_riscv32
#define qlist_destroy_obj qlist_destroy_obj_riscv32
#define qlist_empty qlist_empty_riscv32
#define qlist_entry_obj qlist_entry_obj_riscv32
#define qlist_first qlist_first_riscv32
#define qlist_iter qlist_iter_riscv32
#define qlist_new qlist_new_riscv32
#define qlist_next qlist_next_riscv32
#define qlist_peek qlist_peek_riscv32
#define qlist_pop qlist_pop_riscv32
#define qlist_size qlist_size_riscv32
#define qlist_size_iter qlist_size_iter_riscv32
#define qlist_type qlist_type_riscv32
#define qlit_equal_qobject qlit_equal_qobject_riscv32
#define qobject_from_qlit qobject_from_qlit_riscv32
#define qobject_get_try_str qobject_get_try_str_riscv32
#define qobject_input_end_implicit_struct qobject_input_end_implicit_struct_riscv32
#define qobject_input_end_list qobject_input_end_list_riscv32
#define qobject_input_end_struct qobject_input_end_struct_riscv32
#define qobject_input_get_next_type qobject_input_get_next_type_riscv32
#define qobject_input_get_object qobject_input_get_object_riscv32
#define qobject_input_get_visitor qobject_input_get_visitor_riscv32
#define qobject_input_next_list qobject_input_next_list_riscv32
#define qobject_input_optional qobject_input_optional_riscv32
#define qobject_input_pop qobject_input_pop_riscv32
#define qobject_input_push qobject_input_push_riscv32
#define qobject_input_start_implicit_struct qobject_input_start_implicit_struct_riscv32
#define qobject_input_start_list qobject_input_start_list_riscv32
#define qobject_input_start_struct qobject_input_start_struct_riscv32
#define qobject_input_type_bool qobject_input_type_bool_riscv32
#define qobject_input_type_int qobject_input_type_int_riscv32
#define qobject_input_type_number qobject_input_type_number_riscv32
#define qobject_input_type_str qobject_input_type_str_riscv32
#define qobject_input_visitor_cleanup qobject_input_visitor_cleanup_riscv32
#define qobject_input_visitor_new qobject_input_visitor_new_riscv32
#define qobject_input_visitor_new_strict qobject_input_visitor_new_strict_riscv32
#define qobject_output_add_obj qobject_output_add_obj_riscv32
#define qobject_output_end_list qobject_output_end_list_riscv32
#define qobject_output_end_struct qobject_output_end_struct_riscv32
#define qobject_output_first qobject_output_first_riscv32
#define qobject_output_get_qobject qobject_output_get_qobject_riscv32
#define qobject_output_get_visitor qobject_output_get_visitor_riscv32
#define qobject_output_last qobject_output_last_riscv32
#define qobject_output_next_list qobject_output_next_list_riscv32
#define qobject_output_pop qobject_output_pop_riscv32
#define qobject_output_push_obj qobject_output_push_obj_riscv32
#define qobject_output_start_list qobject_output_start_list_riscv32
#define qobject_output_start_struct qobject_output_start_struct_riscv32
#define qobject_output_type_bool qobject_output_type_bool_riscv32
#define qobject_output_type_int qobject_output_type_int_riscv32
#define qobject_output_type_number qobject_output_type_number_riscv32
#define qobject_output_type_str qobject_output_type_str_riscv32
#define qobject_output_visitor_cleanup qobject_output_visitor_cleanup_riscv32
#define qobject_output_visitor_new qobject_output_visitor_new_riscv32
#define qobject_decref qobject_decref_riscv32
#define qobject_type qobject_type_riscv32
#define qstring_append qstring_append_riscv32
#define qstring_append_chr qstring_append_chr_riscv32
#define qstring_append_int qstring_append_int_riscv32
#define qstring_destroy_obj qstring_destroy_obj_riscv32
#define qstring_from_escaped_str qstring_from_escaped_str_riscv32
#define qstring_from_str qstring_from_str_riscv32
#define qstring_from_substr qstring_from_substr_riscv32
#define qstring_get_length qstring_get_length_riscv32
#define qstring_get_str qstring_get_str_riscv32
#define qstring_get_try_str qstring_get_try_str_riscv32
#define qstring_new qstring_new_riscv32
#define qstring_type qstring_type_riscv32
#define ram_block_add ram_block_add_riscv32
#define ram_size ram_size_riscv32
#define range_compare range_compare_riscv32
#define range_covers_byte range_covers_byte_riscv32
#define range_get_last range_get_last_riscv32
#define range_merge range_merge_riscv32
#define ranges_can_merge ranges_can_merge_riscv32
#define raw_read raw_read_riscv32
#define raw_write raw_write_riscv32
#define rcon rcon_riscv32
#define read_raw_cp_reg read_raw_cp_reg_riscv32
#define recip_estimate recip_estimate_riscv32
#define recip_sqrt_estimate recip_sqrt_estimate_riscv32
#define register_cp_regs_for_features register_cp_regs_for_features_riscv32
#define register_multipage register_multipage_riscv32
#define register_subpage register_subpage_riscv32
#define register_tm_clones register_tm_clones_riscv32
#define register_types_object register_types_object_riscv32
#define regnames regnames_riscv32
#define render_memory_region render_memory_region_riscv32
#define reset_all_temps reset_all_temps_riscv32
#define reset_temp reset_temp_riscv32
#define restore_state_to_opc restore_state_to_opc_riscv32
#define resume_all_vcpus resume_all_vcpus_riscv32
#define rol32 rol32_riscv32
#define rol64 rol64_riscv32
#define ror32 ror32_riscv32
#define ror64 ror64_riscv32
#define roundAndPackFloat128 roundAndPackFloat128_riscv32
#define roundAndPackFloat16 roundAndPackFloat16_riscv32
#define roundAndPackFloat32 roundAndPackFloat32_riscv32
#define roundAndPackFloat64 roundAndPackFloat64_riscv32
#define roundAndPackFloatx80 roundAndPackFloatx80_riscv32
#define roundAndPackInt32 roundAndPackInt32_riscv32
#define roundAndPackInt64 roundAndPackInt64_riscv32
#define roundAndPackUint64 roundAndPackUint64_riscv32
#define round_to_inf round_to_inf_riscv32
#define run_on_cpu run_on_cpu_riscv32
#define s0 s0_riscv32
#define s1 s1_riscv32
#define sa1100_initfn sa1100_initfn_riscv32
#define sa1110_initfn sa1110_initfn_riscv32
#define save_globals save_globals_riscv32
#define scr_write scr_write_riscv32
#define sctlr_write sctlr_write_riscv32
#define set_bit set_bit_riscv32
#define set_bits set_bits_riscv32
#define set_default_nan_mode set_default_nan_mode_riscv32
#define set_feature set_feature_riscv32
#define set_float_detect_tininess set_float_detect_tininess_riscv32
#define set_float_exception_flags set_float_exception_flags_riscv32
#define set_float_rounding_mode set_float_rounding_mode_riscv32
#define set_flush_inputs_to_zero set_flush_inputs_to_zero_riscv32
#define set_flush_to_zero set_flush_to_zero_riscv32
#define set_preferred_target_page_bits set_preferred_target_page_bits_riscv32
#define set_swi_errno set_swi_errno_riscv32
#define sextract32 sextract32_riscv32
#define sextract64 sextract64_riscv32
#define shift128ExtraRightJamming shift128ExtraRightJamming_riscv32
#define shift128Right shift128Right_riscv32
#define shift128RightJamming shift128RightJamming_riscv32
#define shift32RightJamming shift32RightJamming_riscv32
#define shift64ExtraRightJamming shift64ExtraRightJamming_riscv32
#define shift64RightJamming shift64RightJamming_riscv32
#define shifter_out_im shifter_out_im_riscv32
#define shortShift128Left shortShift128Left_riscv32
#define shortShift192Left shortShift192Left_riscv32
#define simd_desc simd_desc_riscv32
#define simple_mpu_ap_bits simple_mpu_ap_bits_riscv32
#define size_code_gen_buffer size_code_gen_buffer_riscv32
#define softmmu_lock_user softmmu_lock_user_riscv32
#define softmmu_lock_user_string softmmu_lock_user_string_riscv32
#define softmmu_tget32 softmmu_tget32_riscv32
#define softmmu_tget8 softmmu_tget8_riscv32
#define softmmu_tput32 softmmu_tput32_riscv32
#define softmmu_unlock_user softmmu_unlock_user_riscv32
#define sort_constraints sort_constraints_riscv32
#define sp_el0_access sp_el0_access_riscv32
#define spsel_read spsel_read_riscv32
#define spsel_write spsel_write_riscv32
#define start_list start_list_riscv32
#define stb_p stb_p_riscv32
#define stb_phys stb_phys_riscv32
#define stb_phys_cached stb_phys_cached_riscv32
#define stl_be_p stl_be_p_riscv32
#define stl_be_phys stl_be_phys_riscv32
#define stl_be_phys_cached stl_be_phys_cached_riscv32
#define stl_he_p stl_he_p_riscv32
#define stl_le_p stl_le_p_riscv32
#define stl_le_phys stl_le_phys_riscv32
#define stl_le_phys_cached stl_le_phys_cached_riscv32
#define stl_phys stl_phys_riscv32
#define stl_phys_cached stl_phys_cached_riscv32
#define stl_phys_internal stl_phys_internal_riscv32
#define stl_phys_notdirty stl_phys_notdirty_riscv32
#define stl_phys_notdirty_cached stl_phys_notdirty_cached_riscv32
#define store_cpu_offset store_cpu_offset_riscv32
#define store_reg store_reg_riscv32
#define store_reg_bx store_reg_bx_riscv32
#define store_reg_from_load store_reg_from_load_riscv32
#define stq_be_p stq_be_p_riscv32
#define stq_be_phys stq_be_phys_riscv32
#define stq_be_phys_cached stq_be_phys_cached_riscv32
#define stq_he_p stq_he_p_riscv32
#define stq_le_p stq_le_p_riscv32
#define stq_le_phys stq_le_phys_riscv32
#define stq_le_phys_cached stq_le_phys_cached_riscv32
#define stq_phys stq_phys_riscv32
#define stq_phys_cached stq_phys_cached_riscv32
#define string_input_get_visitor string_input_get_visitor_riscv32
#define string_input_visitor_cleanup string_input_visitor_cleanup_riscv32
#define string_input_visitor_new string_input_visitor_new_riscv32
#define stristart stristart_riscv32
#define strongarm_cp_reginfo strongarm_cp_reginfo_riscv32
#define strpadcpy strpadcpy_riscv32
#define strstart strstart_riscv32
#define stw_be_p stw_be_p_riscv32
#define stw_be_phys stw_be_phys_riscv32
#define stw_be_phys_cached stw_be_phys_cached_riscv32
#define stw_he_p stw_he_p_riscv32
#define stw_le_p stw_le_p_riscv32
#define stw_le_phys stw_le_phys_riscv32
#define stw_le_phys_cached stw_le_phys_cached_riscv32
#define stw_phys stw_phys_riscv32
#define stw_phys_cached stw_phys_cached_riscv32
#define stw_phys_internal stw_phys_internal_riscv32
#define sub128 sub128_riscv32
#define sub16_sat sub16_sat_riscv32
#define sub16_usat sub16_usat_riscv32
#define sub192 sub192_riscv32
#define sub8_sat sub8_sat_riscv32
#define sub8_usat sub8_usat_riscv32
#define subFloat128Sigs subFloat128Sigs_riscv32
#define subFloat32Sigs subFloat32Sigs_riscv32
#define subFloat64Sigs subFloat64Sigs_riscv32
#define subFloatx80Sigs subFloatx80Sigs_riscv32
#define subpage_accepts subpage_accepts_riscv32
#define subpage_init subpage_init_riscv32
#define subpage_ops subpage_ops_riscv32
#define subpage_read subpage_read_riscv32
#define subpage_register subpage_register_riscv32
#define subpage_write subpage_write_riscv32
#define suffix_mul suffix_mul_riscv32
#define swap_commutative swap_commutative_riscv32
#define swap_commutative2 swap_commutative2_riscv32
#define switch_mode switch_mode_riscv32
#define syn_aa32_bkpt syn_aa32_bkpt_riscv32
#define syn_aa32_hvc syn_aa32_hvc_riscv32
#define syn_aa32_smc syn_aa32_smc_riscv32
#define syn_aa32_svc syn_aa32_svc_riscv32
#define syn_breakpoint syn_breakpoint_riscv32
#define syn_cp14_rrt_trap syn_cp14_rrt_trap_riscv32
#define syn_cp14_rt_trap syn_cp14_rt_trap_riscv32
#define syn_cp15_rrt_trap syn_cp15_rrt_trap_riscv32
#define syn_cp15_rt_trap syn_cp15_rt_trap_riscv32
#define syn_data_abort syn_data_abort_riscv32
#define syn_fp_access_trap syn_fp_access_trap_riscv32
#define syn_insn_abort syn_insn_abort_riscv32
#define syn_swstep syn_swstep_riscv32
#define syn_uncategorized syn_uncategorized_riscv32
#define syn_watchpoint syn_watchpoint_riscv32
#define sync_globals sync_globals_riscv32
#define syscall_err syscall_err_riscv32
#define system_bus_class_init system_bus_class_init_riscv32
#define system_bus_info system_bus_info_riscv32
#define t2ee_cp_reginfo t2ee_cp_reginfo_riscv32
#define table_logic_cc table_logic_cc_riscv32
#define target_el_table target_el_table_riscv32
#define target_parse_constraint target_parse_constraint_riscv32
#define target_words_bigendian target_words_bigendian_riscv32
#define tb_alloc tb_alloc_riscv32
#define tb_alloc_page tb_alloc_page_riscv32
#define tb_check_watchpoint tb_check_watchpoint_riscv32
#define tb_cleanup tb_cleanup_riscv32
#define tb_find_fast tb_find_fast_riscv32
#define tb_find_pc tb_find_pc_riscv32
#define tb_find_slow tb_find_slow_riscv32
#define tb_flush tb_flush_riscv32
#define tb_flush_jmp_cache tb_flush_jmp_cache_riscv32
#define tb_free tb_free_riscv32
#define tb_gen_code tb_gen_code_riscv32
#define tb_hash_remove tb_hash_remove_riscv32
#define tb_htable_lookup tb_htable_lookup_riscv32
#define tb_invalidate_phys_addr tb_invalidate_phys_addr_riscv32
#define tb_invalidate_phys_page_fast tb_invalidate_phys_page_fast_riscv32
#define tb_invalidate_phys_page_range tb_invalidate_phys_page_range_riscv32
#define tb_invalidate_phys_range tb_invalidate_phys_range_riscv32
#define tb_jmp_cache_hash_func tb_jmp_cache_hash_func_riscv32
#define tb_jmp_cache_hash_page tb_jmp_cache_hash_page_riscv32
#define tb_jmp_remove tb_jmp_remove_riscv32
#define tb_link_page tb_link_page_riscv32
#define tb_page_remove tb_page_remove_riscv32
#define tb_phys_hash_func tb_phys_hash_func_riscv32
#define tb_phys_invalidate tb_phys_invalidate_riscv32
#define tb_reset_jump tb_reset_jump_riscv32
#define tb_set_jmp_target tb_set_jmp_target_riscv32
#define tcg_accel_class_init tcg_accel_class_init_riscv32
#define tcg_accel_type tcg_accel_type_riscv32
#define tcg_add_param_i32 tcg_add_param_i32_riscv32
#define tcg_add_param_i64 tcg_add_param_i64_riscv32
#define tcg_add_target_add_op_defs tcg_add_target_add_op_defs_riscv32
#define tcg_allowed tcg_allowed_riscv32
#define tcg_can_emit_vec_op tcg_can_emit_vec_op_riscv32
#define tcg_canonicalize_memop tcg_canonicalize_memop_riscv32
#define tcg_commit tcg_commit_riscv32
#define tcg_cond_to_jcc tcg_cond_to_jcc_riscv32
#define tcg_const_i32 tcg_const_i32_riscv32
#define tcg_const_i64 tcg_const_i64_riscv32
#define tcg_const_local_i32 tcg_const_local_i32_riscv32
#define tcg_const_local_i64 tcg_const_local_i64_riscv32
#define tcg_const_ones_vec tcg_const_ones_vec_riscv32
#define tcg_const_ones_vec_matching tcg_const_ones_vec_matching_riscv32
#define tcg_const_zeros_vec tcg_const_zeros_vec_riscv32
#define tcg_const_zeros_vec_matching tcg_const_zeros_vec_matching_riscv32
#define tcg_constant_folding tcg_constant_folding_riscv32
#define tcg_context_init tcg_context_init_riscv32
#define tcg_cpu_exec tcg_cpu_exec_riscv32
#define tcg_current_code_size tcg_current_code_size_riscv32
#define tcg_dump_info tcg_dump_info_riscv32
#define tcg_dump_ops tcg_dump_ops_riscv32
#define tcg_emit_op tcg_emit_op_riscv32
#define tcg_enabled tcg_enabled_riscv32
#define tcg_exec_all tcg_exec_all_riscv32
#define tcg_exec_init tcg_exec_init_riscv32
#define tcg_expand_vec_op tcg_expand_vec_op_riscv32
#define tcg_find_helper tcg_find_helper_riscv32
#define tcg_flush_softmmu_tlb tcg_flush_softmmu_tlb_riscv32
#define tcg_func_start tcg_func_start_riscv32
#define tcg_gen_abs_i32 tcg_gen_abs_i32_riscv32
#define tcg_gen_add2_i32 tcg_gen_add2_i32_riscv32
#define tcg_gen_add2_i64 tcg_gen_add2_i64_riscv32
#define tcg_gen_add_i32 tcg_gen_add_i32_riscv32
#define tcg_gen_add_i64 tcg_gen_add_i64_riscv32
#define tcg_gen_add_vec tcg_gen_add_vec_riscv32
#define tcg_gen_addi_i32 tcg_gen_addi_i32_riscv32
#define tcg_gen_addi_i64 tcg_gen_addi_i64_riscv32
#define tcg_gen_and_i32 tcg_gen_and_i32_riscv32
#define tcg_gen_and_i64 tcg_gen_and_i64_riscv32
#define tcg_gen_and_vec tcg_gen_and_vec_riscv32
#define tcg_gen_andc_i32 tcg_gen_andc_i32_riscv32
#define tcg_gen_andc_i64 tcg_gen_andc_i64_riscv32
#define tcg_gen_andc_vec tcg_gen_andc_vec_riscv32
#define tcg_gen_andi_i32 tcg_gen_andi_i32_riscv32
#define tcg_gen_andi_i64 tcg_gen_andi_i64_riscv32
#define tcg_gen_atomic_add_fetch_i32 tcg_gen_atomic_add_fetch_i32_riscv32
#define tcg_gen_atomic_add_fetch_i64 tcg_gen_atomic_add_fetch_i64_riscv32
#define tcg_gen_atomic_and_fetch_i32 tcg_gen_atomic_and_fetch_i32_riscv32
#define tcg_gen_atomic_and_fetch_i64 tcg_gen_atomic_and_fetch_i64_riscv32
#define tcg_gen_atomic_cmpxchg_i32 tcg_gen_atomic_cmpxchg_i32_riscv32
#define tcg_gen_atomic_cmpxchg_i64 tcg_gen_atomic_cmpxchg_i64_riscv32
#define tcg_gen_atomic_fetch_add_i32 tcg_gen_atomic_fetch_add_i32_riscv32
#define tcg_gen_atomic_fetch_add_i64 tcg_gen_atomic_fetch_add_i64_riscv32
#define tcg_gen_atomic_fetch_and_i32 tcg_gen_atomic_fetch_and_i32_riscv32
#define tcg_gen_atomic_fetch_and_i64 tcg_gen_atomic_fetch_and_i64_riscv32
#define tcg_gen_atomic_fetch_or_i32 tcg_gen_atomic_fetch_or_i32_riscv32
#define tcg_gen_atomic_fetch_or_i64 tcg_gen_atomic_fetch_or_i64_riscv32
#define tcg_gen_atomic_fetch_smax_i32 tcg_gen_atomic_fetch_smax_i32_riscv32
#define tcg_gen_atomic_fetch_smax_i64 tcg_gen_atomic_fetch_smax_i64_riscv32
#define tcg_gen_atomic_fetch_smin_i32 tcg_gen_atomic_fetch_smin_i32_riscv32
#define tcg_gen_atomic_fetch_smin_i64 tcg_gen_atomic_fetch_smin_i64_riscv32
#define tcg_gen_atomic_fetch_umax_i32 tcg_gen_atomic_fetch_umax_i32_riscv32
#define tcg_gen_atomic_fetch_umax_i64 tcg_gen_atomic_fetch_umax_i64_riscv32
#define tcg_gen_atomic_fetch_umin_i32 tcg_gen_atomic_fetch_umin_i32_riscv32
#define tcg_gen_atomic_fetch_umin_i64 tcg_gen_atomic_fetch_umin_i64_riscv32
#define tcg_gen_atomic_fetch_xor_i32 tcg_gen_atomic_fetch_xor_i32_riscv32
#define tcg_gen_atomic_fetch_xor_i64 tcg_gen_atomic_fetch_xor_i64_riscv32
#define tcg_gen_atomic_or_fetch_i32 tcg_gen_atomic_or_fetch_i32_riscv32
#define tcg_gen_atomic_or_fetch_i64 tcg_gen_atomic_or_fetch_i64_riscv32
#define tcg_gen_atomic_smax_fetch_i32 tcg_gen_atomic_smax_fetch_i32_riscv32
#define tcg_gen_atomic_smax_fetch_i64 tcg_gen_atomic_smax_fetch_i64_riscv32
#define tcg_gen_atomic_smin_fetch_i32 tcg_gen_atomic_smin_fetch_i32_riscv32
#define tcg_gen_atomic_smin_fetch_i64 tcg_gen_atomic_smin_fetch_i64_riscv32
#define tcg_gen_atomic_umax_fetch_i32 tcg_gen_atomic_umax_fetch_i32_riscv32
#define tcg_gen_atomic_umax_fetch_i64 tcg_gen_atomic_umax_fetch_i64_riscv32
#define tcg_gen_atomic_umin_fetch_i32 tcg_gen_atomic_umin_fetch_i32_riscv32
#define tcg_gen_atomic_umin_fetch_i64 tcg_gen_atomic_umin_fetch_i64_riscv32
#define tcg_gen_atomic_xchg_i32 tcg_gen_atomic_xchg_i32_riscv32
#define tcg_gen_atomic_xchg_i64 tcg_gen_atomic_xchg_i64_riscv32
#define tcg_gen_atomic_xor_fetch_i32 tcg_gen_atomic_xor_fetch_i32_riscv32
#define tcg_gen_atomic_xor_fetch_i64 tcg_gen_atomic_xor_fetch_i64_riscv32
#define tcg_gen_br tcg_gen_br_riscv32
#define tcg_gen_brcond_i32 tcg_gen_brcond_i32_riscv32
#define tcg_gen_brcond_i64 tcg_gen_brcond_i64_riscv32
#define tcg_gen_brcondi_i32 tcg_gen_brcondi_i32_riscv32
#define tcg_gen_brcondi_i64 tcg_gen_brcondi_i64_riscv32
#define tcg_gen_bswap16_i32 tcg_gen_bswap16_i32_riscv32
#define tcg_gen_bswap16_i64 tcg_gen_bswap16_i64_riscv32
#define tcg_gen_bswap32_i32 tcg_gen_bswap32_i32_riscv32
#define tcg_gen_bswap32_i64 tcg_gen_bswap32_i64_riscv32
#define tcg_gen_bswap64_i64 tcg_gen_bswap64_i64_riscv32
#define tcg_gen_callN tcg_gen_callN_riscv32
#define tcg_gen_clrsb_i32 tcg_gen_clrsb_i32_riscv32
#define tcg_gen_clrsb_i64 tcg_gen_clrsb_i64_riscv32
#define tcg_gen_clz_i32 tcg_gen_clz_i32_riscv32
#define tcg_gen_clz_i64 tcg_gen_clz_i64_riscv32
#define tcg_gen_clzi_i32 tcg_gen_clzi_i32_riscv32
#define tcg_gen_clzi_i64 tcg_gen_clzi_i64_riscv32
#define tcg_gen_cmp_vec tcg_gen_cmp_vec_riscv32
#define tcg_gen_ctpop_i32 tcg_gen_ctpop_i32_riscv32
#define tcg_gen_ctpop_i64 tcg_gen_ctpop_i64_riscv32
#define tcg_gen_ctz_i32 tcg_gen_ctz_i32_riscv32
#define tcg_gen_ctz_i64 tcg_gen_ctz_i64_riscv32
#define tcg_gen_ctzi_i32 tcg_gen_ctzi_i32_riscv32
#define tcg_gen_ctzi_i64 tcg_gen_ctzi_i64_riscv32
#define tcg_gen_code tcg_gen_code_riscv32
#define tcg_gen_concat_i32_i64 tcg_gen_concat_i32_i64_riscv32
#define tcg_gen_deposit_i32 tcg_gen_deposit_i32_riscv32
#define tcg_gen_deposit_i64 tcg_gen_deposit_i64_riscv32
#define tcg_gen_deposit_z_i32 tcg_gen_deposit_z_i32_riscv32
#define tcg_gen_deposit_z_i64 tcg_gen_deposit_z_i64_riscv32
#define tcg_gen_discard_i64 tcg_gen_discard_i64_riscv32
#define tcg_gen_div_i32 tcg_gen_div_i32_riscv32
#define tcg_gen_div_i64 tcg_gen_div_i64_riscv32
#define tcg_gen_divu_i32 tcg_gen_divu_i32_riscv32
#define tcg_gen_divu_i64 tcg_gen_divu_i64_riscv32
#define tcg_gen_dup8i_vec tcg_gen_dup8i_vec_riscv32
#define tcg_gen_dup16i_vec tcg_gen_dup16i_vec_riscv32
#define tcg_gen_dup32i_vec tcg_gen_dup32i_vec_riscv32
#define tcg_gen_dup64i_vec tcg_gen_dup64i_vec_riscv32
#define tcg_gen_dupi_vec tcg_gen_dupi_vec_riscv32
#define tcg_gen_dup_i32_vec tcg_gen_dup_i32_vec_riscv32
#define tcg_gen_dup_i64_vec tcg_gen_dup_i64_vec_riscv32
#define tcg_gen_eqv_i32 tcg_gen_eqv_i32_riscv32
#define tcg_gen_eqv_i64 tcg_gen_eqv_i64_riscv32
#define tcg_gen_eqv_vec tcg_gen_eqv_vec_riscv32
#define tcg_gen_exit_tb tcg_gen_exit_tb_riscv32
#define tcg_gen_ext16s_i32 tcg_gen_ext16s_i32_riscv32
#define tcg_gen_ext16s_i64 tcg_gen_ext16s_i64_riscv32
#define tcg_gen_ext16u_i32 tcg_gen_ext16u_i32_riscv32
#define tcg_gen_ext16u_i64 tcg_gen_ext16u_i64_riscv32
#define tcg_gen_ext32s_i64 tcg_gen_ext32s_i64_riscv32
#define tcg_gen_ext32u_i64 tcg_gen_ext32u_i64_riscv32
#define tcg_gen_ext8s_i32 tcg_gen_ext8s_i32_riscv32
#define tcg_gen_ext8s_i64 tcg_gen_ext8s_i64_riscv32
#define tcg_gen_ext8u_i32 tcg_gen_ext8u_i32_riscv32
#define tcg_gen_ext8u_i64 tcg_gen_ext8u_i64_riscv32
#define tcg_gen_ext_i32_i64 tcg_gen_ext_i32_i64_riscv32
#define tcg_gen_extr32_i64 tcg_gen_extr32_i64_riscv32
#define tcg_gen_extr_i64_i32 tcg_gen_extr_i64_i32_riscv32
#define tcg_gen_extract_i32 tcg_gen_extract_i32_riscv32
#define tcg_gen_extract_i64 tcg_gen_extract_i64_riscv32
#define tcg_gen_extrh_i64_i32 tcg_gen_extrh_i64_i32_riscv32
#define tcg_gen_extrl_i64_i32 tcg_gen_extrl_i64_i32_riscv32
#define tcg_gen_extu_i32_i64 tcg_gen_extu_i32_i64_riscv32
#define tcg_gen_goto_tb tcg_gen_goto_tb_riscv32
#define tcg_gen_gvec_2 tcg_gen_gvec_2_riscv32
#define tcg_gen_gvec_2i tcg_gen_gvec_2i_riscv32
#define tcg_gen_gvec_2i_ool tcg_gen_gvec_2i_ool_riscv32
#define tcg_gen_gvec_2s tcg_gen_gvec_2s_riscv32
#define tcg_gen_gvec_2_ool tcg_gen_gvec_2_ool_riscv32
#define tcg_gen_gvec_2_ptr tcg_gen_gvec_2_ptr_riscv32
#define tcg_gen_gvec_3 tcg_gen_gvec_3_riscv32
#define tcg_gen_gvec_3_ool tcg_gen_gvec_3_ool_riscv32
#define tcg_gen_gvec_3_ptr tcg_gen_gvec_3_ptr_riscv32
#define tcg_gen_gvec_4 tcg_gen_gvec_4_riscv32
#define tcg_gen_gvec_4_ool tcg_gen_gvec_4_ool_riscv32
#define tcg_gen_gvec_4_ptr tcg_gen_gvec_4_ptr_riscv32
#define tcg_gen_gvec_5_ool tcg_gen_gvec_5_ool_riscv32
#define tcg_gen_gvec_add tcg_gen_gvec_add_riscv32
#define tcg_gen_gvec_addi tcg_gen_gvec_addi_riscv32
#define tcg_gen_gvec_adds tcg_gen_gvec_adds_riscv32
#define tcg_gen_gvec_adds8 tcg_gen_gvec_adds8_riscv32
#define tcg_gen_gvec_adds16 tcg_gen_gvec_adds16_riscv32
#define tcg_gen_gvec_adds32 tcg_gen_gvec_adds32_riscv32
#define tcg_gen_gvec_adds64 tcg_gen_gvec_adds64_riscv32
#define tcg_gen_gvec_and tcg_gen_gvec_and_riscv32
#define tcg_gen_gvec_andc tcg_gen_gvec_andc_riscv32
#define tcg_gen_gvec_andi tcg_gen_gvec_andi_riscv32
#define tcg_gen_gvec_ands tcg_gen_gvec_ands_riscv32
#define tcg_gen_gvec_cmp tcg_gen_gvec_cmp_riscv32
#define tcg_gen_gvec_dup8i tcg_gen_gvec_dup8i_riscv32
#define tcg_gen_gvec_dup16i tcg_gen_gvec_dup16i_riscv32
#define tcg_gen_gvec_dup32i tcg_gen_gvec_dup32i_riscv32
#define tcg_gen_gvec_dup64i tcg_gen_gvec_dup64i_riscv32
#define tcg_gen_gvec_dup_i32 tcg_gen_gvec_dup_i32_riscv32
#define tcg_gen_gvec_dup_i64 tcg_gen_gvec_dup_i64_riscv32
#define tcg_gen_gvec_dup_mem tcg_gen_gvec_dup_mem_riscv32
#define tcg_gen_gvec_eqv tcg_gen_gvec_eqv_riscv32
#define tcg_gen_gvec_mov tcg_gen_gvec_mov_riscv32
#define tcg_gen_gvec_mul tcg_gen_gvec_mul_riscv32
#define tcg_gen_gvec_muli tcg_gen_gvec_muli_riscv32
#define tcg_gen_gvec_muls tcg_gen_gvec_muls_riscv32
#define tcg_gen_gvec_muls8 tcg_gen_gvec_muls8_riscv32
#define tcg_gen_gvec_muls16 tcg_gen_gvec_muls16_riscv32
#define tcg_gen_gvec_muls32 tcg_gen_gvec_muls32_riscv32
#define tcg_gen_gvec_muls64 tcg_gen_gvec_muls64_riscv32
#define tcg_gen_gvec_nand tcg_gen_gvec_nand_riscv32
#define tcg_gen_gvec_neg tcg_gen_gvec_neg_riscv32
#define tcg_gen_gvec_nor tcg_gen_gvec_nor_riscv32
#define tcg_gen_gvec_not tcg_gen_gvec_not_riscv32
#define tcg_gen_gvec_or tcg_gen_gvec_or_riscv32
#define tcg_gen_gvec_orc tcg_gen_gvec_orc_riscv32
#define tcg_gen_gvec_ori tcg_gen_gvec_ori_riscv32
#define tcg_gen_gvec_ors tcg_gen_gvec_ors_riscv32
#define tcg_gen_gvec_sari tcg_gen_gvec_sari_riscv32
#define tcg_gen_gvec_shli tcg_gen_gvec_shli_riscv32
#define tcg_gen_gvec_shri tcg_gen_gvec_shri_riscv32
#define tcg_gen_gvec_smax tcg_gen_gvec_smax_riscv32
#define tcg_gen_gvec_smin tcg_gen_gvec_smin_riscv32
#define tcg_gen_gvec_ssadd tcg_gen_gvec_ssadd_riscv32
#define tcg_gen_gvec_sssub tcg_gen_gvec_sssub_riscv32
#define tcg_gen_gvec_sub tcg_gen_gvec_sub_riscv32
#define tcg_gen_gvec_subs tcg_gen_gvec_subs_riscv32
#define tcg_gen_gvec_subs8 tcg_gen_gvec_subs8_riscv32
#define tcg_gen_gvec_subs16 tcg_gen_gvec_subs16_riscv32
#define tcg_gen_gvec_subs32 tcg_gen_gvec_subs32_riscv32
#define tcg_gen_gvec_subs64 tcg_gen_gvec_subs64_riscv32
#define tcg_gen_gvec_umax tcg_gen_gvec_umax_riscv32
#define tcg_gen_gvec_umin tcg_gen_gvec_umin_riscv32
#define tcg_gen_gvec_usadd tcg_gen_gvec_usadd_riscv32
#define tcg_gen_gvec_ussub tcg_gen_gvec_ussub_riscv32
#define tcg_gen_gvec_xor tcg_gen_gvec_xor_riscv32
#define tcg_gen_gvec_xori tcg_gen_gvec_xori_riscv32
#define tcg_gen_gvec_xors tcg_gen_gvec_xors_riscv32
#define tcg_gen_insn_start tcg_gen_insn_start_riscv32
#define tcg_gen_ld16s_i64 tcg_gen_ld16s_i64_riscv32
#define tcg_gen_ld16u_i64 tcg_gen_ld16u_i64_riscv32
#define tcg_gen_ld32s_i64 tcg_gen_ld32s_i64_riscv32
#define tcg_gen_ld32u_i64 tcg_gen_ld32u_i64_riscv32
#define tcg_gen_ld8s_i64 tcg_gen_ld8s_i64_riscv32
#define tcg_gen_ld8u_i64 tcg_gen_ld8u_i64_riscv32
#define tcg_gen_ld_i32 tcg_gen_ld_i32_riscv32
#define tcg_gen_ld_i64 tcg_gen_ld_i64_riscv32
#define tcg_gen_ld_vec tcg_gen_ld_vec_riscv32
#define tcg_gen_ldst_op_i32 tcg_gen_ldst_op_i32_riscv32
#define tcg_gen_ldst_op_i64 tcg_gen_ldst_op_i64_riscv32
#define tcg_gen_lookup_and_goto_ptr tcg_gen_lookup_and_goto_ptr_riscv32
#define tcg_gen_mb tcg_gen_mb_riscv32
#define tcg_gen_mov_i32 tcg_gen_mov_i32_riscv32
#define tcg_gen_mov_i64 tcg_gen_mov_i64_riscv32
#define tcg_gen_mov_vec tcg_gen_mov_vec_riscv32
#define tcg_gen_movcond_i32 tcg_gen_movcond_i32_riscv32
#define tcg_gen_movcond_i64 tcg_gen_movcond_i64_riscv32
#define tcg_gen_movi_i32 tcg_gen_movi_i32_riscv32
#define tcg_gen_movi_i64 tcg_gen_movi_i64_riscv32
#define tcg_gen_mul_i32 tcg_gen_mul_i32_riscv32
#define tcg_gen_mul_i64 tcg_gen_mul_i64_riscv32
#define tcg_gen_mul_vec tcg_gen_mul_vec_riscv32
#define tcg_gen_muli_i32 tcg_gen_muli_i32_riscv32
#define tcg_gen_muli_i64 tcg_gen_muli_i64_riscv32
#define tcg_gen_muls2_i32 tcg_gen_muls2_i32_riscv32
#define tcg_gen_muls2_i64 tcg_gen_muls2_i64_riscv32
#define tcg_gen_mulsu2_i32 tcg_gen_mulsu2_i32_riscv32
#define tcg_gen_mulsu2_i64 tcg_gen_mulsu2_i64_riscv32
#define tcg_gen_mulu2_i32 tcg_gen_mulu2_i32_riscv32
#define tcg_gen_mulu2_i64 tcg_gen_mulu2_i64_riscv32
#define tcg_gen_nand_i32 tcg_gen_nand_i32_riscv32
#define tcg_gen_nand_i64 tcg_gen_nand_i64_riscv32
#define tcg_gen_nand_vec tcg_gen_nand_vec_riscv32
#define tcg_gen_neg_i32 tcg_gen_neg_i32_riscv32
#define tcg_gen_neg_i64 tcg_gen_neg_i64_riscv32
#define tcg_gen_neg_vec tcg_gen_neg_vec_riscv32
#define tcg_gen_nor_i32 tcg_gen_nor_i32_riscv32
#define tcg_gen_nor_i64 tcg_gen_nor_i64_riscv32
#define tcg_gen_nor_vec tcg_gen_nor_vec_riscv32
#define tcg_gen_not_i32 tcg_gen_not_i32_riscv32
#define tcg_gen_not_i64 tcg_gen_not_i64_riscv32
#define tcg_gen_not_vec tcg_gen_not_vec_riscv32
#define tcg_gen_op1 tcg_gen_op1_riscv32
#define tcg_gen_op1i tcg_gen_op1i_riscv32
#define tcg_gen_op2 tcg_gen_op2_riscv32
#define tcg_gen_op2_i32 tcg_gen_op2_i32_riscv32
#define tcg_gen_op2_i64 tcg_gen_op2_i64_riscv32
#define tcg_gen_op2i_i32 tcg_gen_op2i_i32_riscv32
#define tcg_gen_op2i_i64 tcg_gen_op2i_i64_riscv32
#define tcg_gen_op3 tcg_gen_op3_riscv32
#define tcg_gen_op3_i32 tcg_gen_op3_i32_riscv32
#define tcg_gen_op3_i64 tcg_gen_op3_i64_riscv32
#define tcg_gen_op4 tcg_gen_op4_riscv32
#define tcg_gen_op4_i32 tcg_gen_op4_i32_riscv32
#define tcg_gen_op4i_i32 tcg_gen_op4i_i32_riscv32
#define tcg_gen_op4ii_i32 tcg_gen_op4ii_i32_riscv32
#define tcg_gen_op4ii_i64 tcg_gen_op4ii_i64_riscv32
#define tcg_gen_op5 tcg_gen_op5_riscv32
#define tcg_gen_op5ii_i32 tcg_gen_op5ii_i32_riscv32
#define tcg_gen_op6 tcg_gen_op6_riscv32
#define tcg_gen_op6_i32 tcg_gen_op6_i32_riscv32
#define tcg_gen_op6i_i32 tcg_gen_op6i_i32_riscv32
#define tcg_gen_op6i_i64 tcg_gen_op6i_i64_riscv32
#define tcg_gen_or_i32 tcg_gen_or_i32_riscv32
#define tcg_gen_or_i64 tcg_gen_or_i64_riscv32
#define tcg_gen_or_vec tcg_gen_or_vec_riscv32
#define tcg_gen_orc_i32 tcg_gen_orc_i32_riscv32
#define tcg_gen_orc_i64 tcg_gen_orc_i64_riscv32
#define tcg_gen_orc_vec tcg_gen_orc_vec_riscv32
#define tcg_gen_ori_i32 tcg_gen_ori_i32_riscv32
#define tcg_gen_ori_i64 tcg_gen_ori_i64_riscv32
#define tcg_gen_qemu_ld_i32 tcg_gen_qemu_ld_i32_riscv32
#define tcg_gen_qemu_ld_i64 tcg_gen_qemu_ld_i64_riscv32
#define tcg_gen_qemu_st_i32 tcg_gen_qemu_st_i32_riscv32
#define tcg_gen_qemu_st_i64 tcg_gen_qemu_st_i64_riscv32
#define tcg_gen_rem_i32 tcg_gen_rem_i32_riscv32
#define tcg_gen_rem_i64 tcg_gen_rem_i64_riscv32
#define tcg_gen_remu_i32 tcg_gen_remu_i32_riscv32
#define tcg_gen_remu_i64 tcg_gen_remu_i64_riscv32
#define tcg_gen_rotl_i32 tcg_gen_rotl_i32_riscv32
#define tcg_gen_rotl_i64 tcg_gen_rotl_i64_riscv32
#define tcg_gen_rotli_i32 tcg_gen_rotli_i32_riscv32
#define tcg_gen_rotli_i64 tcg_gen_rotli_i64_riscv32
#define tcg_gen_rotr_i32 tcg_gen_rotr_i32_riscv32
#define tcg_gen_rotr_i64 tcg_gen_rotr_i64_riscv32
#define tcg_gen_rotri_i32 tcg_gen_rotri_i32_riscv32
#define tcg_gen_rotri_i64 tcg_gen_rotri_i64_riscv32
#define tcg_gen_sar_i32 tcg_gen_sar_i32_riscv32
#define tcg_gen_sar_i64 tcg_gen_sar_i64_riscv32
#define tcg_gen_sari_i32 tcg_gen_sari_i32_riscv32
#define tcg_gen_sari_i64 tcg_gen_sari_i64_riscv32
#define tcg_gen_sari_vec tcg_gen_sari_vec_riscv32
#define tcg_gen_setcond_i32 tcg_gen_setcond_i32_riscv32
#define tcg_gen_setcond_i64 tcg_gen_setcond_i64_riscv32
#define tcg_gen_setcondi_i32 tcg_gen_setcondi_i32_riscv32
#define tcg_gen_setcondi_i64 tcg_gen_setcondi_i64_riscv32
#define tcg_gen_sextract_i32 tcg_gen_sextract_i32_riscv32
#define tcg_gen_sextract_i64 tcg_gen_sextract_i64_riscv32
#define tcg_gen_shifti_i64 tcg_gen_shifti_i64_riscv32
#define tcg_gen_shl_i32 tcg_gen_shl_i32_riscv32
#define tcg_gen_shl_i64 tcg_gen_shl_i64_riscv32
#define tcg_gen_shli_i32 tcg_gen_shli_i32_riscv32
#define tcg_gen_shli_i64 tcg_gen_shli_i64_riscv32
#define tcg_gen_shli_vec tcg_gen_shli_vec_riscv32
#define tcg_gen_shr_i32 tcg_gen_shr_i32_riscv32
#define tcg_gen_shr_i64 tcg_gen_shr_i64_riscv32
#define tcg_gen_shri_i32 tcg_gen_shri_i32_riscv32
#define tcg_gen_shri_i64 tcg_gen_shri_i64_riscv32
#define tcg_gen_shri_vec tcg_gen_shri_vec_riscv32
#define tcg_gen_smax_i32 tcg_gen_smax_i32_riscv32
#define tcg_gen_smax_i64 tcg_gen_smax_i64_riscv32
#define tcg_gen_smax_vec tcg_gen_smax_vec_riscv32
#define tcg_gen_smin_i32 tcg_gen_smin_i32_riscv32
#define tcg_gen_smin_i64 tcg_gen_smin_i64_riscv32
#define tcg_gen_smin_vec tcg_gen_smin_vec_riscv32
#define tcg_gen_ssadd_vec tcg_gen_ssadd_vec_riscv32
#define tcg_gen_sssub_vec tcg_gen_sssub_vec_riscv32
#define tcg_gen_st_i32 tcg_gen_st_i32_riscv32
#define tcg_gen_st_i64 tcg_gen_st_i64_riscv32
#define tcg_gen_st_vec tcg_gen_st_vec_riscv32
#define tcg_gen_stl_vec tcg_gen_stl_vec_riscv32
#define tcg_gen_sub2_i32 tcg_gen_sub2_i32_riscv32
#define tcg_gen_sub2_i64 tcg_gen_sub2_i64_riscv32
#define tcg_gen_sub_i32 tcg_gen_sub_i32_riscv32
#define tcg_gen_sub_i64 tcg_gen_sub_i64_riscv32
#define tcg_gen_sub_vec tcg_gen_sub_vec_riscv32
#define tcg_gen_subfi_i32 tcg_gen_subfi_i32_riscv32
#define tcg_gen_subfi_i64 tcg_gen_subfi_i64_riscv32
#define tcg_gen_subi_i32 tcg_gen_subi_i32_riscv32
#define tcg_gen_subi_i64 tcg_gen_subi_i64_riscv32
#define tcg_gen_umax_i32 tcg_gen_umax_i32_riscv32
#define tcg_gen_umax_i64 tcg_gen_umax_i64_riscv32
#define tcg_gen_umax_vec tcg_gen_umax_vec_riscv32
#define tcg_gen_umin_i32 tcg_gen_umin_i32_riscv32
#define tcg_gen_umin_i64 tcg_gen_umin_i64_riscv32
#define tcg_gen_umin_vec tcg_gen_umin_vec_riscv32
#define tcg_gen_usadd_vec tcg_gen_usadd_vec_riscv32
#define tcg_gen_ussub_vec tcg_gen_ussub_vec_riscv32
#define tcg_gen_vec_add8_i64 tcg_gen_vec_add8_i64_riscv32
#define tcg_gen_vec_add16_i64 tcg_gen_vec_add16_i64_riscv32
#define tcg_gen_vec_add32_i64 tcg_gen_vec_add32_i64_riscv32
#define tcg_gen_vec_neg8_i64 tcg_gen_vec_neg8_i64_riscv32
#define tcg_gen_vec_neg16_i64 tcg_gen_vec_neg16_i64_riscv32
#define tcg_gen_vec_neg32_i64 tcg_gen_vec_neg32_i64_riscv32
#define tcg_gen_vec_sar8i_i64 tcg_gen_vec_sar8i_i64_riscv32
#define tcg_gen_vec_sar16i_i64 tcg_gen_vec_sar16i_i64_riscv32
#define tcg_gen_vec_shl8i_i64 tcg_gen_vec_shl8i_i64_riscv32
#define tcg_gen_vec_shl16i_i64 tcg_gen_vec_shl16i_i64_riscv32
#define tcg_gen_vec_shr8i_i64 tcg_gen_vec_shr8i_i64_riscv32
#define tcg_gen_vec_shr16i_i64 tcg_gen_vec_shr16i_i64_riscv32
#define tcg_gen_vec_sub8_i64 tcg_gen_vec_sub8_i64_riscv32
#define tcg_gen_vec_sub16_i64 tcg_gen_vec_sub16_i64_riscv32
#define tcg_gen_vec_sub32_i64 tcg_gen_vec_sub32_i64_riscv32
#define tcg_gen_xor_i32 tcg_gen_xor_i32_riscv32
#define tcg_gen_xor_i64 tcg_gen_xor_i64_riscv32
#define tcg_gen_xor_vec tcg_gen_xor_vec_riscv32
#define tcg_gen_xori_i32 tcg_gen_xori_i32_riscv32
#define tcg_gen_xori_i64 tcg_gen_xori_i64_riscv32
#define tcg_get_arg_str_i32 tcg_get_arg_str_i32_riscv32
#define tcg_get_arg_str_i64 tcg_get_arg_str_i64_riscv32
#define tcg_get_arg_str_idx tcg_get_arg_str_idx_riscv32
#define tcg_global_mem_new_i32 tcg_global_mem_new_i32_riscv32
#define tcg_global_mem_new_i64 tcg_global_mem_new_i64_riscv32
#define tcg_global_mem_new_internal tcg_global_mem_new_internal_riscv32
#define tcg_global_reg_new_i32 tcg_global_reg_new_i32_riscv32
#define tcg_global_reg_new_i64 tcg_global_reg_new_i64_riscv32
#define tcg_global_reg_new_internal tcg_global_reg_new_internal_riscv32
#define tcg_handle_interrupt tcg_handle_interrupt_riscv32
#define tcg_init tcg_init_riscv32
#define tcg_invert_cond tcg_invert_cond_riscv32
#define tcg_la_bb_end tcg_la_bb_end_riscv32
#define tcg_la_br_end tcg_la_br_end_riscv32
#define tcg_la_func_end tcg_la_func_end_riscv32
#define tcg_liveness_analysis tcg_liveness_analysis_riscv32
#define tcg_malloc tcg_malloc_riscv32
#define tcg_malloc_internal tcg_malloc_internal_riscv32
#define tcg_op_defs_org tcg_op_defs_org_riscv32
#define tcg_op_insert_after tcg_op_insert_after_riscv32
#define tcg_op_insert_before tcg_op_insert_before_riscv32
#define tcg_op_remove tcg_op_remove_riscv32
#define tcg_op_supported tcg_op_supported_riscv32
#define tcg_opt_gen_mov tcg_opt_gen_mov_riscv32
#define tcg_opt_gen_movi tcg_opt_gen_movi_riscv32
#define tcg_optimize tcg_optimize_riscv32
#define tcg_out16 tcg_out16_riscv32
#define tcg_out32 tcg_out32_riscv32
#define tcg_out64 tcg_out64_riscv32
#define tcg_out8 tcg_out8_riscv32
#define tcg_out_addi tcg_out_addi_riscv32
#define tcg_out_branch tcg_out_branch_riscv32
#define tcg_out_brcond32 tcg_out_brcond32_riscv32
#define tcg_out_brcond64 tcg_out_brcond64_riscv32
#define tcg_out_bswap32 tcg_out_bswap32_riscv32
#define tcg_out_bswap64 tcg_out_bswap64_riscv32
#define tcg_out_call tcg_out_call_riscv32
#define tcg_out_cmp tcg_out_cmp_riscv32
#define tcg_out_ext16s tcg_out_ext16s_riscv32
#define tcg_out_ext16u tcg_out_ext16u_riscv32
#define tcg_out_ext32s tcg_out_ext32s_riscv32
#define tcg_out_ext32u tcg_out_ext32u_riscv32
#define tcg_out_ext8s tcg_out_ext8s_riscv32
#define tcg_out_ext8u tcg_out_ext8u_riscv32
#define tcg_out_jmp tcg_out_jmp_riscv32
#define tcg_out_jxx tcg_out_jxx_riscv32
#define tcg_out_label tcg_out_label_riscv32
#define tcg_out_ld tcg_out_ld_riscv32
#define tcg_out_modrm tcg_out_modrm_riscv32
#define tcg_out_modrm_offset tcg_out_modrm_offset_riscv32
#define tcg_out_modrm_sib_offset tcg_out_modrm_sib_offset_riscv32
#define tcg_out_mov tcg_out_mov_riscv32
#define tcg_out_movcond32 tcg_out_movcond32_riscv32
#define tcg_out_movcond64 tcg_out_movcond64_riscv32
#define tcg_out_movi tcg_out_movi_riscv32
#define tcg_out_op tcg_out_op_riscv32
#define tcg_out_pop tcg_out_pop_riscv32
#define tcg_out_push tcg_out_push_riscv32
#define tcg_out_qemu_ld tcg_out_qemu_ld_riscv32
#define tcg_out_qemu_ld_direct tcg_out_qemu_ld_direct_riscv32
#define tcg_out_qemu_ld_slow_path tcg_out_qemu_ld_slow_path_riscv32
#define tcg_out_qemu_st tcg_out_qemu_st_riscv32
#define tcg_out_qemu_st_direct tcg_out_qemu_st_direct_riscv32
#define tcg_out_qemu_st_slow_path tcg_out_qemu_st_slow_path_riscv32
#define tcg_out_reloc tcg_out_reloc_riscv32
#define tcg_out_rolw_8 tcg_out_rolw_8_riscv32
#define tcg_out_setcond32 tcg_out_setcond32_riscv32
#define tcg_out_setcond64 tcg_out_setcond64_riscv32
#define tcg_out_shifti tcg_out_shifti_riscv32
#define tcg_out_st tcg_out_st_riscv32
#define tcg_out_tb_finalize tcg_out_tb_finalize_riscv32
#define tcg_out_tb_init tcg_out_tb_init_riscv32
#define tcg_out_tlb_load tcg_out_tlb_load_riscv32
#define tcg_out_vex_modrm tcg_out_vex_modrm_riscv32
#define tcg_patch32 tcg_patch32_riscv32
#define tcg_patch8 tcg_patch8_riscv32
#define tcg_pcrel_diff tcg_pcrel_diff_riscv32
#define tcg_pool_reset tcg_pool_reset_riscv32
#define tcg_prologue_init tcg_prologue_init_riscv32
#define tcg_ptr_byte_diff tcg_ptr_byte_diff_riscv32
#define tcg_reg_alloc tcg_reg_alloc_riscv32
#define tcg_reg_alloc_bb_end tcg_reg_alloc_bb_end_riscv32
#define tcg_reg_alloc_call tcg_reg_alloc_call_riscv32
#define tcg_reg_alloc_mov tcg_reg_alloc_mov_riscv32
#define tcg_reg_alloc_movi tcg_reg_alloc_movi_riscv32
#define tcg_reg_alloc_op tcg_reg_alloc_op_riscv32
#define tcg_reg_alloc_start tcg_reg_alloc_start_riscv32
#define tcg_reg_free tcg_reg_free_riscv32
#define tcg_reg_sync tcg_reg_sync_riscv32
#define tcg_set_frame tcg_set_frame_riscv32
#define tcg_set_nop tcg_set_nop_riscv32
#define tcg_swap_cond tcg_swap_cond_riscv32
#define tcg_target_call_iarg_regs tcg_target_call_iarg_regs_riscv32
#define tcg_target_call_oarg_regs tcg_target_call_oarg_regs_riscv32
#define tcg_target_callee_save_regs tcg_target_callee_save_regs_riscv32
#define tcg_target_const_match tcg_target_const_match_riscv32
#define tcg_target_deposit_valid tcg_target_deposit_valid_riscv32
#define tcg_target_init tcg_target_init_riscv32
#define tcg_target_qemu_prologue tcg_target_qemu_prologue_riscv32
#define tcg_target_reg_alloc_order tcg_target_reg_alloc_order_riscv32
#define tcg_tb_alloc tcg_tb_alloc_riscv32
#define tcg_temp_alloc tcg_temp_alloc_riscv32
#define tcg_temp_free_internal tcg_temp_free_internal_riscv32
#define tcg_temp_local_new_i32 tcg_temp_local_new_i32_riscv32
#define tcg_temp_local_new_i64 tcg_temp_local_new_i64_riscv32
#define tcg_temp_new_i32 tcg_temp_new_i32_riscv32
#define tcg_temp_new_i64 tcg_temp_new_i64_riscv32
#define tcg_temp_new_internal tcg_temp_new_internal_riscv32
#define tcg_temp_new_vec tcg_temp_new_vec_riscv32
#define tcg_temp_new_vec_matching tcg_temp_new_vec_matching_riscv32
#define tdb_hash tdb_hash_riscv32
#define teecr_write teecr_write_riscv32
#define teehbr_access teehbr_access_riscv32
#define temp_allocate_frame temp_allocate_frame_riscv32
#define temp_dead temp_dead_riscv32
#define temp_save temp_save_riscv32
#define temp_sync temp_sync_riscv32
#define temps_are_copies temps_are_copies_riscv32
#define tgen_arithi tgen_arithi_riscv32
#define tgen_arithr tgen_arithr_riscv32
#define thumb2_logic_op thumb2_logic_op_riscv32
#define ti925t_initfn ti925t_initfn_riscv32
#define tlb_add_large_page tlb_add_large_page_riscv32
#define tlb_init tlb_init_riscv32
#define tlb_fill tlb_fill_riscv32
#define tlb_flush tlb_flush_riscv32
#define tlb_flush_by_mmuidx tlb_flush_by_mmuidx_riscv32
#define tlb_flush_entry tlb_flush_entry_riscv32
#define tlb_flush_page tlb_flush_page_riscv32
#define tlb_flush_page_by_mmuidx tlb_flush_page_by_mmuidx_riscv32
#define tlb_is_dirty_ram tlb_is_dirty_ram_riscv32
#define tlb_reset_dirty tlb_reset_dirty_riscv32
#define tlb_reset_dirty_range tlb_reset_dirty_range_riscv32
#define tlb_set_dirty tlb_set_dirty_riscv32
#define tlb_set_page tlb_set_page_riscv32
#define tlb_set_page_with_attrs tlb_set_page_with_attrs_riscv32
#define tlb_vaddr_to_host tlb_vaddr_to_host_riscv32
#define tlbi_aa64_asid_is_write tlbi_aa64_asid_is_write_riscv32
#define tlbi_aa64_asid_write tlbi_aa64_asid_write_riscv32
#define tlbi_aa64_va_is_write tlbi_aa64_va_is_write_riscv32
#define tlbi_aa64_va_write tlbi_aa64_va_write_riscv32
#define tlbi_aa64_vaa_is_write tlbi_aa64_vaa_is_write_riscv32
#define tlbi_aa64_vaa_write tlbi_aa64_vaa_write_riscv32
#define tlbiall_is_write tlbiall_is_write_riscv32
#define tlbiall_write tlbiall_write_riscv32
#define tlbiasid_is_write tlbiasid_is_write_riscv32
#define tlbiasid_write tlbiasid_write_riscv32
#define tlbimva_is_write tlbimva_is_write_riscv32
#define tlbimva_write tlbimva_write_riscv32
#define tlbimvaa_is_write tlbimvaa_is_write_riscv32
#define tlbimvaa_write tlbimvaa_write_riscv32
#define to_qiv to_qiv_riscv32
#define to_qov to_qov_riscv32
#define token_get_type token_get_type_riscv32
#define token_get_value token_get_value_riscv32
#define token_is_escape token_is_escape_riscv32
#define token_is_keyword token_is_keyword_riscv32
#define token_is_operator token_is_operator_riscv32
#define tokens_append_from_iter tokens_append_from_iter_riscv32
#define tosa_init tosa_init_riscv32
#define tosa_machine_init_register_types tosa_machine_init_register_types_riscv32
#define translator_loop translator_loop_riscv32
#define translator_loop_temp_check translator_loop_temp_check_riscv32
#define tswap32 tswap32_riscv32
#define tswap64 tswap64_riscv32
#define type_class_get_size type_class_get_size_riscv32
#define type_get_by_name type_get_by_name_riscv32
#define type_get_parent type_get_parent_riscv32
#define type_has_parent type_has_parent_riscv32
#define type_initialize type_initialize_riscv32
#define type_initialize_interface type_initialize_interface_riscv32
#define type_is_ancestor type_is_ancestor_riscv32
#define type_new type_new_riscv32
#define type_object_get_size type_object_get_size_riscv32
#define type_register_internal type_register_internal_riscv32
#define type_table_add type_table_add_riscv32
#define type_table_get type_table_get_riscv32
#define type_table_lookup type_table_lookup_riscv32
#define uint16_to_float16 uint16_to_float16_riscv32
#define uint16_to_float16_scalbn uint16_to_float16_scalbn_riscv32
#define uint16_to_float32 uint16_to_float32_riscv32
#define uint16_to_float32_scalbn uint16_to_float32_scalbn_riscv32
#define uint16_to_float64 uint16_to_float64_riscv32
#define uint16_to_float64_scalbn uint16_to_float64_scalbn_riscv32
#define uint32_to_float16 uint32_to_float16_riscv32
#define uint32_to_float16_scalbn uint32_to_float16_scalbn_riscv32
#define uint32_to_float32 uint32_to_float32_riscv32
#define uint32_to_float32_scalbn uint32_to_float32_scalbn_riscv32
#define uint32_to_float64 uint32_to_float64_riscv32
#define uint32_to_float64_scalbn uint32_to_float64_scalbn_riscv32
#define uint64_to_float128 uint64_to_float128_riscv32
#define uint64_to_float16 uint64_to_float16_riscv32
#define uint64_to_float16_scalbn uint64_to_float16_scalbn_riscv32
#define uint64_to_float32 uint64_to_float32_riscv32
#define uint64_to_float32_scalbn uint64_to_float32_scalbn_riscv32
#define uint64_to_float64 uint64_to_float64_riscv32
#define uint64_to_float64_scalbn uint64_to_float64_scalbn_riscv32
#define unassigned_io_ops unassigned_io_ops_riscv32
#define unassigned_io_read unassigned_io_read_riscv32
#define unassigned_io_write unassigned_io_write_riscv32
#define unassigned_mem_accepts unassigned_mem_accepts_riscv32
#define unassigned_mem_ops unassigned_mem_ops_riscv32
#define unassigned_mem_read unassigned_mem_read_riscv32
#define unassigned_mem_write unassigned_mem_write_riscv32
#define unicorn_free_empty_flat_view unicorn_free_empty_flat_view_riscv32
#define update_spsel update_spsel_riscv32
#define use_idiv_instructions_rt use_idiv_instructions_rt_riscv32
#define v6_cp_reginfo v6_cp_reginfo_riscv32
#define v6k_cp_reginfo v6k_cp_reginfo_riscv32
#define v7_cp_reginfo v7_cp_reginfo_riscv32
#define v7m_pop v7m_pop_riscv32
#define v7m_push v7m_push_riscv32
#define v7mp_cp_reginfo v7mp_cp_reginfo_riscv32
#define v8_cp_reginfo v8_cp_reginfo_riscv32
#define v8_el2_cp_reginfo v8_el2_cp_reginfo_riscv32
#define v8_el3_cp_reginfo v8_el3_cp_reginfo_riscv32
#define v8_el3_no_el2_cp_reginfo v8_el3_no_el2_cp_reginfo_riscv32
#define vapa_cp_reginfo vapa_cp_reginfo_riscv32
#define vbar_write vbar_write_riscv32
#define vec_gen_2 vec_gen_2_riscv32
#define vec_gen_3 vec_gen_3_riscv32
#define vec_gen_4 vec_gen_4_riscv32
#define vfp_exceptbits_from_host vfp_exceptbits_from_host_riscv32
#define vfp_exceptbits_to_host vfp_exceptbits_to_host_riscv32
#define vfp_get_fpcr vfp_get_fpcr_riscv32
#define vfp_get_fpscr vfp_get_fpscr_riscv32
#define vfp_get_fpsr vfp_get_fpsr_riscv32
#define vfp_reg_offset vfp_reg_offset_riscv32
#define vfp_set_fpcr vfp_set_fpcr_riscv32
#define vfp_set_fpscr vfp_set_fpscr_riscv32
#define vfp_set_fpsr vfp_set_fpsr_riscv32
#define visit_end_implicit_struct visit_end_implicit_struct_riscv32
#define visit_end_list visit_end_list_riscv32
#define visit_end_struct visit_end_struct_riscv32
#define visit_end_union visit_end_union_riscv32
#define visit_get_next_type visit_get_next_type_riscv32
#define visit_next_list visit_next_list_riscv32
#define visit_optional visit_optional_riscv32
#define visit_start_implicit_struct visit_start_implicit_struct_riscv32
#define visit_start_list visit_start_list_riscv32
#define visit_start_struct visit_start_struct_riscv32
#define visit_start_union visit_start_union_riscv32
#define vm_start vm_start_riscv32
#define vmsa_cp_reginfo vmsa_cp_reginfo_riscv32
#define vmsa_tcr_el1_write vmsa_tcr_el1_write_riscv32
#define vmsa_ttbcr_raw_write vmsa_ttbcr_raw_write_riscv32
#define vmsa_ttbcr_reset vmsa_ttbcr_reset_riscv32
#define vmsa_ttbcr_write vmsa_ttbcr_write_riscv32
#define vmsa_ttbr_write vmsa_ttbr_write_riscv32
#define write_cpustate_to_list write_cpustate_to_list_riscv32
#define write_list_to_cpustate write_list_to_cpustate_riscv32
#define write_raw_cp_reg write_raw_cp_reg_riscv32
#define write_v7m_exception write_v7m_exception_riscv32
#define x86_ldl_phys x86_ldl_phys_riscv32
#define x86_ldq_phys x86_ldq_phys_riscv32
#define x86_ldub_phys x86_ldub_phys_riscv32
#define x86_lduw_phys x86_lduw_phys_riscv32
#define x86_op_defs x86_op_defs_riscv32
#define x86_stb_phys x86_stb_phys_riscv32
#define x86_stl_phys x86_stl_phys_riscv32
#define x86_stl_phys_notdirty x86_stl_phys_notdirty_riscv32
#define x86_stq_phys x86_stq_phys_riscv32
#define x86_stw_phys x86_stw_phys_riscv32
#define xpsr_read xpsr_read_riscv32
#define xpsr_write xpsr_write_riscv32
#define xscale_cp_reginfo xscale_cp_reginfo_riscv32
#define xscale_cpar_write xscale_cpar_write_riscv32
#define RISCV32_REGS_STORAGE_SIZE RISCV32_REGS_STORAGE_SIZE_riscv32
#define RISCV64_REGS_STORAGE_SIZE RISCV64_REGS_STORAGE_SIZE_riscv32
#define cpu_riscv_get_fflags cpu_riscv_get_fflags_riscv32
#define cpu_riscv_set_fflags cpu_riscv_set_fflags_riscv32
#define csr_read_helper csr_read_helper_riscv32
#define csr_write_helper csr_write_helper_riscv32
#define decode_insn16 decode_insn16_riscv32
#define decode_insn32 decode_insn32_riscv32
#define do_raise_exception_err do_raise_exception_err_riscv32
#define gen_helper_tlb_flush gen_helper_tlb_flush_riscv32
#define helper_csrrc helper_csrrc_riscv32
#define helper_csrrs helper_csrrs_riscv32
#define helper_csrrw helper_csrrw_riscv32
#define helper_fadd_d helper_fadd_d_riscv32
#define helper_fadd_s helper_fadd_s_riscv32
#define helper_fclass_d helper_fclass_d_riscv32
#define helper_fclass_s helper_fclass_s_riscv32
#define helper_fcvt_d_s helper_fcvt_d_s_riscv32
#define helper_fcvt_d_w helper_fcvt_d_w_riscv32
#define helper_fcvt_d_wu helper_fcvt_d_wu_riscv32
#define helper_fcvt_s_d helper_fcvt_s_d_riscv32
#define helper_fcvt_s_w helper_fcvt_s_w_riscv32
#define helper_fcvt_s_wu helper_fcvt_s_wu_riscv32
#define helper_fcvt_w_d helper_fcvt_w_d_riscv32
#define helper_fcvt_w_s helper_fcvt_w_s_riscv32
#define helper_fcvt_wu_d helper_fcvt_wu_d_riscv32
#define helper_fcvt_wu_s helper_fcvt_wu_s_riscv32
#define helper_fdiv_d helper_fdiv_d_riscv32
#define helper_fdiv_s helper_fdiv_s_riscv32
#define helper_feq_d helper_feq_d_riscv32
#define helper_feq_s helper_feq_s_riscv32
#define helper_fle_d helper_fle_d_riscv32
#define helper_fle_s helper_fle_s_riscv32
#define helper_flt_d helper_flt_d_riscv32
#define helper_flt_s helper_flt_s_riscv32
#define helper_fmadd_d helper_fmadd_d_riscv32
#define helper_fmadd_s helper_fmadd_s_riscv32
#define helper_fmsub_d helper_fmsub_d_riscv32
#define helper_fmsub_s helper_fmsub_s_riscv32
#define helper_fmax_d helper_fmax_d_riscv32
#define helper_fmax_s helper_fmax_s_riscv32
#define helper_fmin_d helper_fmin_d_riscv32
#define helper_fmin_s helper_fmin_s_riscv32
#define helper_fmul_d helper_fmul_d_riscv32
#define helper_fmul_s helper_fmul_s_riscv32
#define helper_fnmadd_d helper_fnmadd_d_riscv32
#define helper_fnmadd_s helper_fnmadd_s_riscv32
#define helper_fnmsub_d helper_fnmsub_d_riscv32
#define helper_fnmsub_s helper_fnmsub_s_riscv32
#define helper_fsqrt_d helper_fsqrt_d_riscv32
#define helper_fsqrt_s helper_fsqrt_s_riscv32
#define helper_fsub_d helper_fsub_d_riscv32
#define helper_fsub_s helper_fsub_s_riscv32
#define helper_mret helper_mret_riscv32
#define helper_tlb_flush helper_tlb_flush_riscv32
#define helper_set_rounding_mode helper_set_rounding_mode_riscv32
#define helper_sret helper_sret_riscv32
#define pmp_hart_has_privs pmp_hart_has_privs_riscv32
#define pmpaddr_csr_read pmpaddr_csr_read_riscv32
#define pmpaddr_csr_write pmpaddr_csr_write_riscv32
#define pmpcfg_csr_read pmpcfg_csr_read_riscv32
#define pmpcfg_csr_write pmpcfg_csr_write_riscv32
#define riscv_cpu_do_interrupt riscv_cpu_do_interrupt_riscv32
#define riscv_cpu_do_unaligned_access riscv_cpu_do_unaligned_access_riscv32
#define riscv_cpu_exec_interrupt riscv_cpu_exec_interrupt_riscv32
#define riscv_cpu_get_fflags riscv_cpu_get_fflags_riscv32
#define riscv_cpu_get_phys_page_debug riscv_cpu_get_phys_page_debug_riscv32
#define riscv_cpu_handle_mmu_fault riscv_cpu_handle_mmu_fault_riscv32
#define riscv_cpu_list riscv_cpu_list_riscv32
#define riscv_cpu_mmu_index riscv_cpu_mmu_index_riscv32
#define riscv_cpu_register_types riscv_cpu_register_types_riscv32
#define riscv_cpu_set_fflags riscv_cpu_set_fflags_riscv32
#define riscv_cpu_set_mode riscv_cpu_set_mode_riscv32
#define riscv_cpu_update_mip riscv_cpu_update_mip_riscv32
#define riscv_csrrw riscv_csrrw_riscv32
#define riscv_excp_names riscv_excp_names_riscv32
#define riscv_fpr_regnames riscv_fpr_regnames_riscv32
#define riscv_get_csr_ops riscv_get_csr_ops_riscv32
#define riscv_int_regnames riscv_int_regnames_riscv32
#define riscv_intr_names riscv_intr_names_riscv32
#define riscv_raise_exception riscv_raise_exception_riscv32
#define riscv_set_csr_ops riscv_set_csr_ops_riscv32
#define riscv_set_local_interrupt riscv_set_local_interrupt_riscv32
#define riscv_set_mode riscv_set_mode_riscv32
#define riscv_translate_init riscv_translate_init_riscv32
#define spike_v1_10_0_machine_init_register_types spike_v1_10_0_machine_init_register_types_riscv32
#endif