mirror of
https://github.com/yuzu-emu/unicorn
synced 2024-11-25 12:28:55 +00:00
97b525a794
Register separate QOM types for each mips cpu model, so it would be possible to reuse generic CPU creation routines. Backports commit 41da212c9ce9482fcfd490170c2611470254f8dc from qemu
56 lines
1.6 KiB
C
56 lines
1.6 KiB
C
/*
|
|
* QEMU MIPS CPU
|
|
*
|
|
* Copyright (c) 2012 SUSE LINUX Products GmbH
|
|
*
|
|
* This library is free software; you can redistribute it and/or
|
|
* modify it under the terms of the GNU Lesser General Public
|
|
* License as published by the Free Software Foundation; either
|
|
* version 2.1 of the License, or (at your option) any later version.
|
|
*
|
|
* This library is distributed in the hope that it will be useful,
|
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
|
* Lesser General Public License for more details.
|
|
*
|
|
* You should have received a copy of the GNU Lesser General Public
|
|
* License along with this library; if not, see
|
|
* <http://www.gnu.org/licenses/lgpl-2.1.html>
|
|
*/
|
|
#ifndef QEMU_MIPS_CPU_QOM_H
|
|
#define QEMU_MIPS_CPU_QOM_H
|
|
|
|
#include "qom/cpu.h"
|
|
|
|
#ifdef TARGET_MIPS64
|
|
#define TYPE_MIPS_CPU "mips64-cpu"
|
|
#else
|
|
#define TYPE_MIPS_CPU "mips-cpu"
|
|
#endif
|
|
|
|
#define MIPS_CPU_CLASS(uc, klass) \
|
|
OBJECT_CLASS_CHECK(uc, MIPSCPUClass, (klass), TYPE_MIPS_CPU)
|
|
#define MIPS_CPU(uc, obj) ((MIPSCPU *)obj)
|
|
#define MIPS_CPU_GET_CLASS(uc, obj) \
|
|
OBJECT_GET_CLASS(uc, MIPSCPUClass, (obj), TYPE_MIPS_CPU)
|
|
|
|
/**
|
|
* MIPSCPUClass:
|
|
* @parent_realize: The parent class' realize handler.
|
|
* @parent_reset: The parent class' reset handler.
|
|
*
|
|
* A MIPS CPU model.
|
|
*/
|
|
typedef struct MIPSCPUClass {
|
|
/*< private >*/
|
|
CPUClass parent_class;
|
|
/*< public >*/
|
|
|
|
DeviceRealize parent_realize;
|
|
void (*parent_reset)(CPUState *cpu);
|
|
const struct mips_def_t *cpu_def;
|
|
} MIPSCPUClass;
|
|
|
|
typedef struct MIPSCPU MIPSCPU;
|
|
|
|
#endif
|