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Merge pull request #8257 from merryhime/rm-PrepareReschedule

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Remove unused PrepareReschedule function
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Mai M 2022-04-24 17:43:31 -04:00 committed by GitHub
commit 9d64253916
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GPG key ID: 4AEE18F83AFDEB23
7 changed files with 0 additions and 20 deletions
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3
src/core/arm/arm_interface.h
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@ -174,9 +174,6 @@ public:
/// Clears the exclusive monitor's state. /// Clears the exclusive monitor's state.
virtual void ClearExclusiveState() = 0; virtual void ClearExclusiveState() = 0;
/// Prepare core for thread reschedule (if needed to correctly handle state)
virtual void PrepareReschedule() = 0;
/// Signal an interrupt and ask the core to halt as soon as possible. /// Signal an interrupt and ask the core to halt as soon as possible.
virtual void SignalInterrupt() = 0; virtual void SignalInterrupt() = 0;

4
src/core/arm/dynarmic/arm_dynarmic_32.cpp
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@ -327,10 +327,6 @@ void ARM_Dynarmic_32::LoadContext(const ThreadContext32& ctx) {
jit.load()->LoadContext(context); jit.load()->LoadContext(context);
} }
void ARM_Dynarmic_32::PrepareReschedule() {
jit.load()->HaltExecution(break_loop);
}
void ARM_Dynarmic_32::SignalInterrupt() { void ARM_Dynarmic_32::SignalInterrupt() {
jit.load()->HaltExecution(break_loop); jit.load()->HaltExecution(break_loop);
} }

1
src/core/arm/dynarmic/arm_dynarmic_32.h
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@ -57,7 +57,6 @@ public:
void LoadContext(const ThreadContext32& ctx) override; void LoadContext(const ThreadContext32& ctx) override;
void LoadContext(const ThreadContext64& ctx) override {} void LoadContext(const ThreadContext64& ctx) override {}
void PrepareReschedule() override;
void SignalInterrupt() override; void SignalInterrupt() override;
void ClearExclusiveState() override; void ClearExclusiveState() override;

4
src/core/arm/dynarmic/arm_dynarmic_64.cpp
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@ -395,10 +395,6 @@ void ARM_Dynarmic_64::LoadContext(const ThreadContext64& ctx) {
SetTPIDR_EL0(ctx.tpidr); SetTPIDR_EL0(ctx.tpidr);
} }
void ARM_Dynarmic_64::PrepareReschedule() {
jit.load()->HaltExecution(break_loop);
}
void ARM_Dynarmic_64::SignalInterrupt() { void ARM_Dynarmic_64::SignalInterrupt() {
jit.load()->HaltExecution(break_loop); jit.load()->HaltExecution(break_loop);
} }

1
src/core/arm/dynarmic/arm_dynarmic_64.h
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@ -51,7 +51,6 @@ public:
void LoadContext(const ThreadContext32& ctx) override {} void LoadContext(const ThreadContext32& ctx) override {}
void LoadContext(const ThreadContext64& ctx) override; void LoadContext(const ThreadContext64& ctx) override;
void PrepareReschedule() override;
void SignalInterrupt() override; void SignalInterrupt() override;
void ClearExclusiveState() override; void ClearExclusiveState() override;

4
src/core/core.cpp
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@ -505,10 +505,6 @@ bool System::IsPoweredOn() const {
return impl->is_powered_on.load(std::memory_order::relaxed); return impl->is_powered_on.load(std::memory_order::relaxed);
} }
void System::PrepareReschedule() {
// Deprecated, does nothing, kept for backward compatibility.
}
void System::PrepareReschedule(const u32 core_index) { void System::PrepareReschedule(const u32 core_index) {
impl->kernel.PrepareReschedule(core_index); impl->kernel.PrepareReschedule(core_index);
} }

3
src/core/core.h
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@ -193,9 +193,6 @@ public:
/// Gets a reference to the telemetry session for this emulation session. /// Gets a reference to the telemetry session for this emulation session.
[[nodiscard]] const Core::TelemetrySession& TelemetrySession() const; [[nodiscard]] const Core::TelemetrySession& TelemetrySession() const;
/// Prepare the core emulation for a reschedule
void PrepareReschedule();
/// Prepare the core emulation for a reschedule /// Prepare the core emulation for a reschedule
void PrepareReschedule(u32 core_index); void PrepareReschedule(u32 core_index);