mirror of
https://github.com/yuzu-emu/yuzu-mainline
synced 2024-11-24 02:43:51 +00:00
- reenabled MCR and MRC functions now that VFP is attached
- removed HLE::CallMCR function (was pointless)
This commit is contained in:
bunnei
parent
a2804bf701
commit
145a91f21f
4 changed files with 88 additions and 110 deletions
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@ -17,9 +17,9 @@
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#ifndef __ARMEMU_H__
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#define __ARMEMU_H__
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#include "common/common.h"
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#include "armdefs.h"
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//#include "skyeye.h"
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#include "core/arm/interpreter/skyeye_defs.h"
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#include "core/arm/interpreter/armdefs.h"
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extern ARMword isize;
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@ -73,9 +73,7 @@ extern ARMword isize;
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#define ASSIGNT(res) state->TFlag = res
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#define INSN_SIZE (TFLAG ? 2 : 4)
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#else
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#define TBIT (1L << 5)
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#define INSN_SIZE 4
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#define TFLAG 0
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#endif
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/*add armv6 CPSR feature*/
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@ -166,6 +164,7 @@ extern ARMword isize;
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#define PCWRAP(pc) ((pc) & R15PCBITS)
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#endif
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#define PC (state->Reg[15] & PCMASK)
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#define R15CCINTMODE (state->Reg[15] & (CCBITS | R15INTBITS | R15MODEBITS))
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#define R15INT (state->Reg[15] & R15INTBITS)
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#define R15INTPC (state->Reg[15] & (R15INTBITS | R15PCBITS))
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@ -180,11 +179,11 @@ extern ARMword isize;
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#define ER15INT (IFFLAGS << 26)
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#define EMODE (state->Mode)
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//#ifdef MODET
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//#define CPSR (ECC | EINT | EMODE | (TFLAG << 5))
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//#else
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//#define CPSR (ECC | EINT | EMODE)
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//#endif
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#ifdef MODET
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#define CPSR (ECC | EINT | EMODE | (TFLAG << 5))
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#else
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#define CPSR (ECC | EINT | EMODE)
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#endif
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#ifdef MODE32
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#define PATCHR15
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@ -240,12 +239,12 @@ extern ARMword isize;
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} \
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while (0)
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//#ifndef MODE32
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#ifndef MODE32
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#define VECTORS 0x20
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#define LEGALADDR 0x03ffffff
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#define VECTORACCESS(address) (address < VECTORS && ARMul_MODE26BIT && state->prog32Sig)
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#define ADDREXCEPT(address) (address > LEGALADDR && !state->data32Sig)
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//#endif
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#endif
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#define INTERNALABORT(address) \
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do \
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@ -421,9 +420,9 @@ extern ARMword isize;
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|| (read_cp15_reg (15, 0, 1) & (1 << (CP))))
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*/
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#define CP_ACCESS_ALLOWED(STATE, CP) \
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(((CP) >= 14) \
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|| (!(STATE)->is_XScale) \
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|| (xscale_cp15_cp_access_allowed(STATE, 15, CP)))
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( ((CP) >= 14) \
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|| (! (STATE)->is_XScale) \
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|| (xscale_cp15_cp_access_allowed(STATE,15,CP)))
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/* Macro to rotate n right by b bits. */
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#define ROTATER(n, b) (((n) >> (b)) | ((n) << (32 - (b))))
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@ -515,7 +514,7 @@ tdstate;
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* out-of-updated with the newer ISA.
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* -- Michael.Kang
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********************************************************************************/
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#define UNDEF_WARNING ERROR_LOG(ARM11, "undefined or unpredicted behavior for arm instruction.\n");
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#define UNDEF_WARNING WARN_LOG(ARM11, "undefined or unpredicted behavior for arm instruction.\n");
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/* Macros to scrutinize instructions. */
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#define UNDEF_Test UNDEF_WARNING
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@ -15,11 +15,9 @@
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along with this program; if not, write to the Free Software
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Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
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#include "armdefs.h"
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#include "armemu.h"
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//#include "ansidecl.h"
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#include "skyeye_defs.h"
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#include "core/arm/interpreter/armdefs.h"
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#include "core/arm/interpreter/armemu.h"
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#include "core/arm/interpreter/skyeye_defs.h"
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#include "core/hle/coprocessor.h"
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#include "core/arm/disassembler/arm_disasm.h"
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@ -127,8 +125,7 @@ ARMul_GetCPSR (ARMul_State * state)
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{
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//chy 2003-08-20: below is from gdb20030716, maybe isn't suitable for system simulator
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//return (CPSR | state->Cpsr); for gdb20030716
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// NOTE(bunnei): Changed this from [now] commented out macro "CPSR"
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return ((ECC | EINT | EMODE | (TFLAG << 5))); //had be tested in old skyeye with gdb5.0-5.3
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return (CPSR); //had be tested in old skyeye with gdb5.0-5.3
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}
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/* This routine sets the value of the CPSR. */
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@ -145,7 +142,7 @@ ARMul_SetCPSR (ARMul_State * state, ARMword value)
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void
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ARMul_FixCPSR (ARMul_State * state, ARMword instr, ARMword rhs)
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{
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{
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state->Cpsr = ARMul_GetCPSR (state);
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//chy 2006-02-16 , should not consider system mode, don't conside 26bit mode
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if (state->Mode != USER26MODE && state->Mode != USER32MODE ) {
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@ -500,8 +497,8 @@ ARMul_LDC (ARMul_State * state, ARMword instr, ARMword address)
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return;
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}
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if (ADDREXCEPT (address))
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INTERNALABORT (address);
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//if (ADDREXCEPT (address))
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// INTERNALABORT (address);
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cpab = (state->LDC[CPNum]) (state, ARMul_FIRST, instr, 0);
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while (cpab == ARMul_BUSY) {
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@ -594,8 +591,8 @@ ARMul_STC (ARMul_State * state, ARMword instr, ARMword address)
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return;
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}
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if (ADDREXCEPT (address) || VECTORACCESS (address))
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INTERNALABORT (address);
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//if (ADDREXCEPT (address) || VECTORACCESS (address))
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// INTERNALABORT (address);
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cpab = (state->STC[CPNum]) (state, ARMul_FIRST, instr, &data);
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while (cpab == ARMul_BUSY) {
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@ -661,40 +658,39 @@ ARMul_STC (ARMul_State * state, ARMword instr, ARMword address)
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void
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ARMul_MCR (ARMul_State * state, ARMword instr, ARMword source)
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{
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HLE::CallMCR(instr, source);
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//unsigned cpab;
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unsigned cpab;
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////printf("SKYEYE ARMul_MCR, CPnum is %x, source %x\n",CPNum, source);
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//if (!CP_ACCESS_ALLOWED (state, CPNum)) {
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// //chy 2004-07-19 should fix in the future ????!!!!
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// //printf("SKYEYE ARMul_MCR, ACCESS_not ALLOWed, UndefinedInstr CPnum is %x, source %x\n",CPNum, source);
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// ARMul_UndefInstr (state, instr);
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// return;
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//}
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//printf("SKYEYE ARMul_MCR, CPnum is %x, source %x\n",CPNum, source);
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if (!CP_ACCESS_ALLOWED (state, CPNum)) {
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//chy 2004-07-19 should fix in the future ????!!!!
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//printf("SKYEYE ARMul_MCR, ACCESS_not ALLOWed, UndefinedInstr CPnum is %x, source %x\n",CPNum, source);
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ARMul_UndefInstr (state, instr);
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return;
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}
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//cpab = (state->MCR[CPNum]) (state, ARMul_FIRST, instr, source);
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cpab = (state->MCR[CPNum]) (state, ARMul_FIRST, instr, source);
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//while (cpab == ARMul_BUSY) {
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// ARMul_Icycles (state, 1, 0);
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while (cpab == ARMul_BUSY) {
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ARMul_Icycles (state, 1, 0);
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// if (IntPending (state)) {
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// cpab = (state->MCR[CPNum]) (state, ARMul_INTERRUPT,
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// instr, 0);
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// return;
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// }
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// else
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// cpab = (state->MCR[CPNum]) (state, ARMul_BUSY, instr,
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// source);
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//}
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if (IntPending (state)) {
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cpab = (state->MCR[CPNum]) (state, ARMul_INTERRUPT,
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instr, 0);
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return;
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}
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else
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cpab = (state->MCR[CPNum]) (state, ARMul_BUSY, instr,
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source);
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}
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//if (cpab == ARMul_CANT) {
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// printf ("SKYEYE ARMul_MCR, CANT, UndefinedInstr %x CPnum is %x, source %x\n", instr, CPNum, source);
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// ARMul_Abort (state, ARMul_UndefinedInstrV);
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//}
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//else {
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// BUSUSEDINCPCN;
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// ARMul_Ccycles (state, 1, 0);
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//}
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if (cpab == ARMul_CANT) {
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printf ("SKYEYE ARMul_MCR, CANT, UndefinedInstr %x CPnum is %x, source %x\n", instr, CPNum, source);
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ARMul_Abort (state, ARMul_UndefinedInstrV);
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}
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else {
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BUSUSEDINCPCN;
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ARMul_Ccycles (state, 1, 0);
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}
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}
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/* This function does the Busy-Waiting for an MCRR instruction. */
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@ -742,37 +738,41 @@ ARMul_MRC (ARMul_State * state, ARMword instr)
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ARMword result = HLE::CallMRC(instr);
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////printf("SKYEYE ARMul_MRC, CPnum is %x, instr %x\n",CPNum, instr);
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//if (!CP_ACCESS_ALLOWED (state, CPNum)) {
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// //chy 2004-07-19 should fix in the future????!!!!
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// //printf("SKYEYE ARMul_MRC,NOT ALLOWed UndefInstr CPnum is %x, instr %x\n",CPNum, instr);
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// ARMul_UndefInstr (state, instr);
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// return -1;
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//}
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if (result != -1) {
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return result;
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}
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//cpab = (state->MRC[CPNum]) (state, ARMul_FIRST, instr, &result);
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//while (cpab == ARMul_BUSY) {
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// ARMul_Icycles (state, 1, 0);
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// if (IntPending (state)) {
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// cpab = (state->MRC[CPNum]) (state, ARMul_INTERRUPT,
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// instr, 0);
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// return (0);
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// }
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// else
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// cpab = (state->MRC[CPNum]) (state, ARMul_BUSY, instr,
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// &result);
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//}
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//if (cpab == ARMul_CANT) {
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// printf ("SKYEYE ARMul_MRC,CANT UndefInstr CPnum is %x, instr %x\n", CPNum, instr);
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// ARMul_Abort (state, ARMul_UndefinedInstrV);
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// /* Parent will destroy the flags otherwise. */
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// result = ECC;
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//}
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//else {
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// BUSUSEDINCPCN;
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// ARMul_Ccycles (state, 1, 0);
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// ARMul_Icycles (state, 1, 0);
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//}
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//printf("SKYEYE ARMul_MRC, CPnum is %x, instr %x\n",CPNum, instr);
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if (!CP_ACCESS_ALLOWED (state, CPNum)) {
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//chy 2004-07-19 should fix in the future????!!!!
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//printf("SKYEYE ARMul_MRC,NOT ALLOWed UndefInstr CPnum is %x, instr %x\n",CPNum, instr);
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ARMul_UndefInstr (state, instr);
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return -1;
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}
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cpab = (state->MRC[CPNum]) (state, ARMul_FIRST, instr, &result);
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while (cpab == ARMul_BUSY) {
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ARMul_Icycles (state, 1, 0);
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if (IntPending (state)) {
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cpab = (state->MRC[CPNum]) (state, ARMul_INTERRUPT,
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instr, 0);
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return (0);
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}
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else
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cpab = (state->MRC[CPNum]) (state, ARMul_BUSY, instr,
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&result);
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}
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if (cpab == ARMul_CANT) {
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printf ("SKYEYE ARMul_MRC,CANT UndefInstr CPnum is %x, instr %x\n", CPNum, instr);
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ARMul_Abort (state, ARMul_UndefinedInstrV);
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/* Parent will destroy the flags otherwise. */
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result = ECC;
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}
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else {
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BUSUSEDINCPCN;
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ARMul_Ccycles (state, 1, 0);
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ARMul_Icycles (state, 1, 0);
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}
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return result;
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}
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@ -907,9 +907,7 @@ ARMul_ScheduleEvent (ARMul_State * state, unsigned int delay,
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state->Now = ARMul_Time (state);
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when = (state->Now + delay) % EVENTLISTSIZE;
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event = (struct EventNode *) malloc (sizeof (struct EventNode));
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_dbg_assert_msg_(ARM11, event, "SKYEYE:ARMul_ScheduleEvent: malloc event error\n");
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event->func = what;
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event->next = *(state->EventPtr + when);
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*(state->EventPtr + when) = event;
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@ -9,42 +9,26 @@
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namespace HLE {
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/// Data synchronization barrier
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u32 DataSynchronizationBarrier() {
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return 0;
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}
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/// Returns the coprocessor (in this case, syscore) command buffer pointer
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Addr GetThreadCommandBuffer() {
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// Called on insruction: mrc p15, 0, r0, c13, c0, 3
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return Memory::KERNEL_MEMORY_VADDR;
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}
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/// Call an MCR (move to coprocessor from ARM register) instruction in HLE
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s32 CallMCR(u32 instruction, u32 value) {
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CoprocessorOperation operation = (CoprocessorOperation)((instruction >> 20) & 0xFF);
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ERROR_LOG(OSHLE, "unimplemented MCR instruction=0x%08X, operation=%02X, value=%08X",
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instruction, operation, value);
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return 0;
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}
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/// Call an MRC (move to ARM register from coprocessor) instruction in HLE
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s32 CallMRC(u32 instruction) {
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CoprocessorOperation operation = (CoprocessorOperation)((instruction >> 20) & 0xFF);
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switch (operation) {
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case DATA_SYNCHRONIZATION_BARRIER:
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return DataSynchronizationBarrier();
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case CALL_GET_THREAD_COMMAND_BUFFER:
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return GetThreadCommandBuffer();
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default:
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ERROR_LOG(OSHLE, "unimplemented MRC instruction 0x%08X", instruction);
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//DEBUG_LOG(OSHLE, "unknown MRC call 0x%08X", instruction);
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break;
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}
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return 0;
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return -1;
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}
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} // namespace
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@ -14,9 +14,6 @@ enum CoprocessorOperation {
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CALL_GET_THREAD_COMMAND_BUFFER = 0xE1,
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};
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/// Call an MCR (move to coprocessor from ARM register) instruction in HLE
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s32 CallMCR(u32 instruction, u32 value);
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/// Call an MRC (move to ARM register from coprocessor) instruction in HLE
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s32 CallMRC(u32 instruction);
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