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https://github.com/yuzu-emu/yuzu-mainline
synced 2024-11-24 20:58:17 +00:00
settings: remove global override for smash on amdvlk
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parent
d66ca8b731
commit
25c3bbba0e
3 changed files with 3 additions and 36 deletions
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@ -435,8 +435,6 @@ struct Values {
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linkage, false, "disable_shader_loop_safety_checks", Category::RendererDebug};
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Setting<bool> enable_renderdoc_hotkey{linkage, false, "renderdoc_hotkey",
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Category::RendererDebug};
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// TODO: remove this once AMDVLK supports VK_EXT_depth_bias_control
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bool renderer_amdvlk_depth_bias_workaround{};
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Setting<bool> disable_buffer_reorder{linkage, false, "disable_buffer_reorder",
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Category::RendererDebug};
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@ -425,11 +425,6 @@ struct System::Impl {
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room_member->SendGameInfo(game_info);
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}
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// Workarounds:
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// Activate this in Super Smash Brothers Ultimate, it only affects AMD cards using AMDVLK
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Settings::values.renderer_amdvlk_depth_bias_workaround =
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params.program_id == 0x1006A800016E000ULL;
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status = SystemResultStatus::Success;
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return status;
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}
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@ -489,9 +484,6 @@ struct System::Impl {
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room_member->SendGameInfo(game_info);
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}
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// Workarounds
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Settings::values.renderer_amdvlk_depth_bias_workaround = false;
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LOG_DEBUG(Core, "Shutdown OK");
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}
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@ -1054,39 +1054,16 @@ void RasterizerVulkan::UpdateDepthBias(Tegra::Engines::Maxwell3D::Regs& regs) {
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regs.zeta.format == Tegra::DepthFormat::X8Z24_UNORM ||
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regs.zeta.format == Tegra::DepthFormat::S8Z24_UNORM ||
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regs.zeta.format == Tegra::DepthFormat::V8Z24_UNORM;
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bool force_unorm = ([&] {
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if (!is_d24 || device.SupportsD24DepthBuffer()) {
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return false;
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}
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if (device.IsExtDepthBiasControlSupported()) {
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return true;
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}
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if (is_d24 && !device.SupportsD24DepthBuffer() && program_id == 0x1006A800016E000ULL) {
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// Only activate this in Super Smash Brothers Ultimate
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// Affects AMD cards using AMDVLK
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if (program_id != 0x1006A800016E000ULL) {
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return false;
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}
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// the base formulas can be obtained from here:
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// https://docs.microsoft.com/en-us/windows/win32/direct3d11/d3d10-graphics-programming-guide-output-merger-stage-depth-bias
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const double rescale_factor =
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static_cast<double>(1ULL << (32 - 24)) / (static_cast<double>(0x1.ep+127));
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units = static_cast<float>(static_cast<double>(units) * rescale_factor);
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return false;
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})();
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}
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scheduler.Record([constant = units, clamp = regs.depth_bias_clamp,
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factor = regs.slope_scale_depth_bias, force_unorm,
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precise = device.HasExactDepthBiasControl()](vk::CommandBuffer cmdbuf) {
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if (force_unorm) {
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VkDepthBiasRepresentationInfoEXT info{
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.sType = VK_STRUCTURE_TYPE_DEPTH_BIAS_REPRESENTATION_INFO_EXT,
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.pNext = nullptr,
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.depthBiasRepresentation =
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VK_DEPTH_BIAS_REPRESENTATION_LEAST_REPRESENTABLE_VALUE_FORCE_UNORM_EXT,
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.depthBiasExact = precise ? VK_TRUE : VK_FALSE,
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};
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cmdbuf.SetDepthBias(constant, clamp, factor, &info);
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return;
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}
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factor = regs.slope_scale_depth_bias](vk::CommandBuffer cmdbuf) {
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cmdbuf.SetDepthBias(constant, clamp, factor);
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});
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}
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