[dump_syms][riscv] Update unittest.

Change 4505156 changed the RISCV register names, this change adjusts
the unittest to match the new names.

Bug: 1432426
Change-Id: I0887d8fc11eec63ab6953ea1a136873591e49286
Reviewed-on: https://chromium-review.googlesource.com/c/breakpad/breakpad/+/4507066
Reviewed-by: Joshua Peraza <jperaza@chromium.org>
This commit is contained in:
Mark Brand 2023-05-08 10:35:58 +02:00 committed by Joshua Peraza
parent 5b101544ca
commit f4a3b346f3

View file

@ -311,8 +311,8 @@ TEST(RegisterNames, X86_64) {
TEST(RegisterNames, RISCV) { TEST(RegisterNames, RISCV) {
vector<string> names = DwarfCFIToModule::RegisterNames::RISCV(); vector<string> names = DwarfCFIToModule::RegisterNames::RISCV();
EXPECT_EQ("x0", names[0]); EXPECT_EQ("pc", names[0]);
EXPECT_EQ("x31", names[31]); EXPECT_EQ("t6", names[31]);
EXPECT_EQ("f0", names[32]); EXPECT_EQ("f0", names[32]);
EXPECT_EQ("f31", names[63]); EXPECT_EQ("f31", names[63]);
EXPECT_EQ("v0", names[96]); EXPECT_EQ("v0", names[96]);