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unicorn/qemu/target/m68k/helper.h

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rework code/block tracing
2016-01-23 02:28:17 +00:00
DEF_HELPER_4(uc_tracecode, void, i32, i32, ptr, i64)
import
2015-08-21 07:04:50 +00:00
DEF_HELPER_1(bitrev, i32, i32)
DEF_HELPER_1(ff1, i32, i32)
target-m68k: Reorg flags handling Separate all ccr bits. Continue to batch updates via cc_op. Signed-off-by: Richard Henderson <rth@twiddle.net> Fix gen_logic_cc() to really extend the size of the result. Fix gen_get_ccr(): update cc_op as it is used by the helper. Factorize flags computing and src/ccr cleanup Backports commit 620c6cf66584bfbee90db84a7e87a6eabf230ca9 from qemu
2018-02-27 14:27:47 +00:00
DEF_HELPER_FLAGS_2(sats, TCG_CALL_NO_RWG_SE, i32, i32, i32)
target-m68k: add 680x0 divu/divs variants Update helper to set the throwing location in case of div-by-0. Cleanup divX.w and add quad word variants of divX.l. Backports commit 0ccb9c1d8128a020720d5c6abf99a470742a1b94 from qemu
2018-03-01 16:37:55 +00:00
DEF_HELPER_3(divuw, void, env, int, i32)
DEF_HELPER_3(divsw, void, env, int, s32)
DEF_HELPER_4(divul, void, env, int, int, i32)
DEF_HELPER_4(divsl, void, env, int, int, s32)
DEF_HELPER_4(divull, void, env, int, int, i32)
DEF_HELPER_4(divsll, void, env, int, int, s32)
import
2015-08-21 07:04:50 +00:00
DEF_HELPER_2(set_sr, void, env, i32)
target/m68k: add the Interrupt Stack Pointer Add the third stack pointer, the Interrupt Stack Pointer (ISP) (680x0 only). This stack will be needed in softmmu mode. Update movec to set/get the value of the three stacks. Backports commit 6e22b28e22aa6ed1b8db6f24da2633868019d4c9 from qemu
2018-03-06 13:37:02 +00:00
DEF_HELPER_3(cf_movec_to, void, env, i32, i32)
DEF_HELPER_3(m68k_movec_to, void, env, i32, i32)
DEF_HELPER_2(m68k_movec_from, i32, env, i32)
target-m68k: add cas/cas2 ops Implement CAS using cmpxchg. Implement CAS2 using helper and either cmpxchg when the 32bit addresses are consecutive, or with parallel_cpus+cpu_loop_exit_atomic() otherwise. Backports commit 14f944063affbcc7bd6df42b060793dbfee8a822 from qemu
2018-03-01 16:55:03 +00:00
DEF_HELPER_4(cas2w, void, env, i32, i32, i32)
DEF_HELPER_4(cas2l, void, env, i32, i32, i32)
import
2015-08-21 07:04:50 +00:00
target-m68k: use floatx80 internally Coldfire uses float64, but 680x0 use floatx80. This patch introduces the use of floatx80 internally and enables 680x0 80bits FPU. Backports commit f83311e4764f1f25a8abdec2b32c64483be1759b from qemu
2018-03-03 23:57:34 +00:00
#define dh_alias_fp ptr
#define dh_ctype_fp FPReg *
#define dh_is_signed_fp dh_is_signed_ptr
DEF_HELPER_3(exts32, void, env, fp, s32)
DEF_HELPER_3(extf32, void, env, fp, f32)
DEF_HELPER_3(extf64, void, env, fp, f64)
DEF_HELPER_2(redf32, f32, env, fp)
DEF_HELPER_2(redf64, f64, env, fp)
DEF_HELPER_2(reds32, s32, env, fp)
target/m68k: add explicit single and double precision operations (part 2) Add fsabs, fdabs, fsneg, fdneg, fsmove and fdmove. The value is converted using the new floatx80_round() function. Backports commit 77bdb2292492fafc4bc0fbb4d8c44fdd0ef1fa8e from qemu
2018-03-04 02:01:17 +00:00
DEF_HELPER_3(fsround, void, env, fp, fp)
DEF_HELPER_3(fdround, void, env, fp, fp)
target-m68k: use floatx80 internally Coldfire uses float64, but 680x0 use floatx80. This patch introduces the use of floatx80 internally and enables 680x0 80bits FPU. Backports commit f83311e4764f1f25a8abdec2b32c64483be1759b from qemu
2018-03-03 23:57:34 +00:00
DEF_HELPER_3(firound, void, env, fp, fp)
DEF_HELPER_3(fitrunc, void, env, fp, fp)
DEF_HELPER_3(fsqrt, void, env, fp, fp)
target/m68k: add explicit single and double precision operations Add fssqrt, fdsqrt, fsadd, fdadd, fssub, fdsub, fsmul, fdmul, fsdiv, fddiv. The precision is managed using set_floatx80_rounding_precision(). Backports commit a51b6bc38bb9b73a40e9486b52be12c810c6f2d9 from qemu
2018-03-04 01:55:38 +00:00
DEF_HELPER_3(fssqrt, void, env, fp, fp)
DEF_HELPER_3(fdsqrt, void, env, fp, fp)
target-m68k: use floatx80 internally Coldfire uses float64, but 680x0 use floatx80. This patch introduces the use of floatx80 internally and enables 680x0 80bits FPU. Backports commit f83311e4764f1f25a8abdec2b32c64483be1759b from qemu
2018-03-03 23:57:34 +00:00
DEF_HELPER_3(fabs, void, env, fp, fp)
target/m68k: add explicit single and double precision operations (part 2) Add fsabs, fdabs, fsneg, fdneg, fsmove and fdmove. The value is converted using the new floatx80_round() function. Backports commit 77bdb2292492fafc4bc0fbb4d8c44fdd0ef1fa8e from qemu
2018-03-04 02:01:17 +00:00
DEF_HELPER_3(fsabs, void, env, fp, fp)
DEF_HELPER_3(fdabs, void, env, fp, fp)
DEF_HELPER_3(fneg, void, env, fp, fp)
DEF_HELPER_3(fsneg, void, env, fp, fp)
DEF_HELPER_3(fdneg, void, env, fp, fp)
target-m68k: use floatx80 internally Coldfire uses float64, but 680x0 use floatx80. This patch introduces the use of floatx80 internally and enables 680x0 80bits FPU. Backports commit f83311e4764f1f25a8abdec2b32c64483be1759b from qemu
2018-03-03 23:57:34 +00:00
DEF_HELPER_4(fadd, void, env, fp, fp, fp)
target/m68k: add explicit single and double precision operations Add fssqrt, fdsqrt, fsadd, fdadd, fssub, fdsub, fsmul, fdmul, fsdiv, fddiv. The precision is managed using set_floatx80_rounding_precision(). Backports commit a51b6bc38bb9b73a40e9486b52be12c810c6f2d9 from qemu
2018-03-04 01:55:38 +00:00
DEF_HELPER_4(fsadd, void, env, fp, fp, fp)
DEF_HELPER_4(fdadd, void, env, fp, fp, fp)
target-m68k: use floatx80 internally Coldfire uses float64, but 680x0 use floatx80. This patch introduces the use of floatx80 internally and enables 680x0 80bits FPU. Backports commit f83311e4764f1f25a8abdec2b32c64483be1759b from qemu
2018-03-03 23:57:34 +00:00
DEF_HELPER_4(fsub, void, env, fp, fp, fp)
target/m68k: add explicit single and double precision operations Add fssqrt, fdsqrt, fsadd, fdadd, fssub, fdsub, fsmul, fdmul, fsdiv, fddiv. The precision is managed using set_floatx80_rounding_precision(). Backports commit a51b6bc38bb9b73a40e9486b52be12c810c6f2d9 from qemu
2018-03-04 01:55:38 +00:00
DEF_HELPER_4(fssub, void, env, fp, fp, fp)
DEF_HELPER_4(fdsub, void, env, fp, fp, fp)
target-m68k: use floatx80 internally Coldfire uses float64, but 680x0 use floatx80. This patch introduces the use of floatx80 internally and enables 680x0 80bits FPU. Backports commit f83311e4764f1f25a8abdec2b32c64483be1759b from qemu
2018-03-03 23:57:34 +00:00
DEF_HELPER_4(fmul, void, env, fp, fp, fp)
target/m68k: add explicit single and double precision operations Add fssqrt, fdsqrt, fsadd, fdadd, fssub, fdsub, fsmul, fdmul, fsdiv, fddiv. The precision is managed using set_floatx80_rounding_precision(). Backports commit a51b6bc38bb9b73a40e9486b52be12c810c6f2d9 from qemu
2018-03-04 01:55:38 +00:00
DEF_HELPER_4(fsmul, void, env, fp, fp, fp)
DEF_HELPER_4(fdmul, void, env, fp, fp, fp)
target/m68k: add fsglmul and fsgldiv fsglmul and fsgldiv truncate data to single precision before computing results. Backports commit 2f77995cebc8027851b8ea8f02c097fb8cdf668a from qemu
2018-03-04 01:59:16 +00:00
DEF_HELPER_4(fsglmul, void, env, fp, fp, fp)
target-m68k: use floatx80 internally Coldfire uses float64, but 680x0 use floatx80. This patch introduces the use of floatx80 internally and enables 680x0 80bits FPU. Backports commit f83311e4764f1f25a8abdec2b32c64483be1759b from qemu
2018-03-03 23:57:34 +00:00
DEF_HELPER_4(fdiv, void, env, fp, fp, fp)
target/m68k: add explicit single and double precision operations Add fssqrt, fdsqrt, fsadd, fdadd, fssub, fdsub, fsmul, fdmul, fsdiv, fddiv. The precision is managed using set_floatx80_rounding_precision(). Backports commit a51b6bc38bb9b73a40e9486b52be12c810c6f2d9 from qemu
2018-03-04 01:55:38 +00:00
DEF_HELPER_4(fsdiv, void, env, fp, fp, fp)
DEF_HELPER_4(fddiv, void, env, fp, fp, fp)
target/m68k: add fsglmul and fsgldiv fsglmul and fsgldiv truncate data to single precision before computing results. Backports commit 2f77995cebc8027851b8ea8f02c097fb8cdf668a from qemu
2018-03-04 01:59:16 +00:00
DEF_HELPER_4(fsgldiv, void, env, fp, fp, fp)
target-m68k: add FPCR and FPSR Backports commit ba62494483ab51ee31c70952b6ce5171a31860b1 from qemu
2018-03-04 00:36:47 +00:00
DEF_HELPER_FLAGS_3(fcmp, TCG_CALL_NO_RWG, void, env, fp, fp)
DEF_HELPER_FLAGS_2(set_fpcr, TCG_CALL_NO_RWG, void, env, i32)
DEF_HELPER_FLAGS_2(ftst, TCG_CALL_NO_RWG, void, env, fp)
target/m68k: add fmovecr fmovecr moves a floating point constant from the FPU ROM to a floating point register. Backports commit 9d403660d91229922c2786e81c23cc9dd8e644f1 from qemu
2018-03-04 01:49:30 +00:00
DEF_HELPER_3(fconst, void, env, fp, i32)
target/m68k: add fmovem Backports commit a1e58ddcb3eed7ec4a158512b9dae46f90492c1b from qemu
2018-03-04 02:03:51 +00:00
DEF_HELPER_3(fmovemx_st_predec, i32, env, i32, i32)
DEF_HELPER_3(fmovemx_st_postinc, i32, env, i32, i32)
DEF_HELPER_3(fmovemx_ld_postinc, i32, env, i32, i32)
DEF_HELPER_3(fmovemd_st_predec, i32, env, i32, i32)
DEF_HELPER_3(fmovemd_st_postinc, i32, env, i32, i32)
DEF_HELPER_3(fmovemd_ld_postinc, i32, env, i32, i32)
target/m68k: add fmod/frem Using a local m68k floatx80_mod() [copied from previous: Written by Andreas Grabher for Previous, NeXT Computer Emulator.] The quotient byte of the FPSR is updated with the result of the operation. Backports commit 591596b77a1872d0652e666271ca055e57ea1e21 from qemu
2018-03-09 06:25:32 +00:00
DEF_HELPER_4(fmod, void, env, fp, fp, fp)
DEF_HELPER_4(frem, void, env, fp, fp, fp)
target/m68k: add fscale, fgetman and fgetexp Using local m68k floatx80_getman(), floatx80_getexp(), floatx80_scale() [copied from previous: Written by Andreas Grabher for Previous, NeXT Computer Emulator.] Backports commit 0d379c1709aa6b2d09dd3b493bfdf3a5fe6debcd from qemu
2018-03-09 06:37:30 +00:00
DEF_HELPER_3(fgetexp, void, env, fp, fp)
DEF_HELPER_3(fgetman, void, env, fp, fp)
DEF_HELPER_4(fscale, void, env, fp, fp, fp)
target/m68k: implement flognp1 Using a local m68k floatx80_lognp1() [copied from previous: Written by Andreas Grabher for Previous, NeXT Computer Emulator.] Backports commit 4b5c65b8f02a057bc1b77839b5012544f96fec80 from qemu
2018-03-12 13:23:49 +00:00
DEF_HELPER_3(flognp1, void, env, fp, fp)
target/m68k: implement flogn Using a local m68k floatx80_logn() [copied from previous: Written by Andreas Grabher for Previous, NeXT Computer Emulator.] Backports commit 50067bd16fead5d78a283130efbf3e3b026de450 from qemu
2018-03-12 13:26:32 +00:00
DEF_HELPER_3(flogn, void, env, fp, fp)
import
2015-08-21 07:04:50 +00:00
DEF_HELPER_3(mac_move, void, env, i32, i32)
DEF_HELPER_3(macmulf, i64, env, i32, i32)
DEF_HELPER_3(macmuls, i64, env, i32, i32)
DEF_HELPER_3(macmulu, i64, env, i32, i32)
DEF_HELPER_2(macsats, void, env, i32)
DEF_HELPER_2(macsatu, void, env, i32)
DEF_HELPER_2(macsatf, void, env, i32)
DEF_HELPER_2(mac_set_flags, void, env, i32)
DEF_HELPER_2(set_macsr, void, env, i32)
DEF_HELPER_2(get_macf, i32, env, i64)
DEF_HELPER_1(get_macs, i32, i64)
DEF_HELPER_1(get_macu, i32, i64)
DEF_HELPER_2(get_mac_extf, i32, env, i32)
DEF_HELPER_2(get_mac_exti, i32, env, i32)
DEF_HELPER_3(set_mac_extf, void, env, i32, i32)
DEF_HELPER_3(set_mac_exts, void, env, i32, i32)
DEF_HELPER_3(set_mac_extu, void, env, i32, i32)
target-m68k: Reorg flags handling Separate all ccr bits. Continue to batch updates via cc_op. Signed-off-by: Richard Henderson <rth@twiddle.net> Fix gen_logic_cc() to really extend the size of the result. Fix gen_get_ccr(): update cc_op as it is used by the helper. Factorize flags computing and src/ccr cleanup Backports commit 620c6cf66584bfbee90db84a7e87a6eabf230ca9 from qemu
2018-02-27 14:27:47 +00:00
DEF_HELPER_2(flush_flags, void, env, i32)
DEF_HELPER_2(set_ccr, void, env, i32)
DEF_HELPER_FLAGS_1(get_ccr, TCG_CALL_NO_WG_SE, i32, env)
import
2015-08-21 07:04:50 +00:00
DEF_HELPER_2(raise_exception, void, env, i32)
target-m68k: Implement bitfield ops for memory Backports commit f2224f2c9a9ed63edaed77ae21ffb1e501d7f247 from qemu
2018-03-02 00:01:11 +00:00
target-m68k: Implement bfffo Backports commit a45f1763cc501861ea4f5eed06e6f58aa681a082 from qemu
2018-03-02 00:10:53 +00:00
DEF_HELPER_FLAGS_3(bfffo_reg, TCG_CALL_NO_RWG_SE, i32, i32, i32, i32)
target-m68k: Implement bitfield ops for memory Backports commit f2224f2c9a9ed63edaed77ae21ffb1e501d7f247 from qemu
2018-03-02 00:01:11 +00:00
DEF_HELPER_FLAGS_4(bfexts_mem, TCG_CALL_NO_WG, i32, env, i32, s32, i32)
DEF_HELPER_FLAGS_4(bfextu_mem, TCG_CALL_NO_WG, i64, env, i32, s32, i32)
DEF_HELPER_FLAGS_5(bfins_mem, TCG_CALL_NO_WG, i32, env, i32, i32, s32, i32)
DEF_HELPER_FLAGS_4(bfchg_mem, TCG_CALL_NO_WG, i32, env, i32, s32, i32)
DEF_HELPER_FLAGS_4(bfclr_mem, TCG_CALL_NO_WG, i32, env, i32, s32, i32)
DEF_HELPER_FLAGS_4(bfset_mem, TCG_CALL_NO_WG, i32, env, i32, s32, i32)
target-m68k: Implement bfffo Backports commit a45f1763cc501861ea4f5eed06e6f58aa681a082 from qemu
2018-03-02 00:10:53 +00:00
DEF_HELPER_FLAGS_4(bfffo_mem, TCG_CALL_NO_WG, i64, env, i32, s32, i32)
target-m68k: Implement bitfield ops for memory Backports commit f2224f2c9a9ed63edaed77ae21ffb1e501d7f247 from qemu
2018-03-02 00:01:11 +00:00
target/m68k: add chk and chk2 chk and chk2 compare a value to boundaries, and trigger a CHK exception if the value is out of bounds. Backports commit 8bf6cbaf396a8b54b138bb8a7c3377f2868ed16e from qemu
2018-03-06 13:08:12 +00:00
DEF_HELPER_3(chk, void, env, s32, s32)
DEF_HELPER_4(chk2, void, env, s32, s32, s32)
target/m68k: add reset The instruction traps if the CPU is not in Supervisor state but the helper is empty because there is no easy way to reset all the peripherals without resetting the CPU itself. Backports commit 0bdb2b3bf5660f892ddbfa09baea56cdca57ad1d from qemu
2018-03-06 13:25:59 +00:00
#if defined(CONFIG_SOFTMMU)
target/m68k: add pflush/ptest Backports commit e55886c3340c3a3f1267a3a3d42082008bb255fb from qemu
2018-03-06 16:21:49 +00:00
DEF_HELPER_3(ptest, void, env, i32, i32)
DEF_HELPER_3(pflush, void, env, i32, i32)
target/m68k: add reset The instruction traps if the CPU is not in Supervisor state but the helper is empty because there is no easy way to reset all the peripherals without resetting the CPU itself. Backports commit 0bdb2b3bf5660f892ddbfa09baea56cdca57ad1d from qemu
2018-03-06 13:25:59 +00:00
DEF_HELPER_FLAGS_1(reset, TCG_CALL_NO_RWG, void, env)
#endif
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