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softfloat: Handle snan_bit_is_one == 0 in MIPS pickNaNMulAdd()

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Only for Mips platform, and only for cases when snan_bit_is_one is 0,
correct the order of argument comparisons in pickNaNMulAdd().

For more info, see [1], page 53, section "3.5.3 NaN Propagation".

[1] "MIPS Architecture for Programmers Volume IV-j:
The MIPS32 SIMD Architecture Module",
Imagination Technologies LTD, Revision 1.12, February 3, 2016

Backports commit c27644f0e9659471e1c9355da5b667960d311937 from qemu
This commit is contained in:
Aleksandar Markovic 2018-02-24 20:40:07 -05:00 committed by Lioncash
parent 33833b6605
commit 3e9325f1e9
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GPG key ID: 4E3C3CC1031BA9C7
1 changed files with 29 additions and 12 deletions
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41
qemu/fpu/softfloat-specialize.h
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@ -569,19 +569,36 @@ static int pickNaNMulAdd(flag aIsQNaN, flag aIsSNaN, flag bIsQNaN, flag bIsSNaN,
return 3;
}
/* Prefer sNaN over qNaN, in the a, b, c order. */
if (aIsSNaN) {
return 0;
} else if (bIsSNaN) {
return 1;
} else if (cIsSNaN) {
return 2;
} else if (aIsQNaN) {
return 0;
} else if (bIsQNaN) {
return 1;
if (status->snan_bit_is_one) {
/* Prefer sNaN over qNaN, in the a, b, c order. */
if (aIsSNaN) {
return 0;
} else if (bIsSNaN) {
return 1;
} else if (cIsSNaN) {
return 2;
} else if (aIsQNaN) {
return 0;
} else if (bIsQNaN) {
return 1;
} else {
return 2;
}
} else {
return 2;
/* Prefer sNaN over qNaN, in the c, a, b order. */
if (cIsSNaN) {
return 2;
} else if (aIsSNaN) {
return 0;
} else if (bIsSNaN) {
return 1;
} else if (cIsQNaN) {
return 2;
} else if (aIsQNaN) {
return 0;
} else {
return 1;
}
}
}
#elif defined(TARGET_PPC)