mirror of
https://github.com/yuzu-emu/unicorn
synced 2024-11-25 15:28:54 +00:00
58059c3a35
Thumb-1 code has some issues in BE32 mode (as currently implemented). In short, since bytes are swapped within words at load time for BE32 executables, this also swaps pairs of adjacent Thumb-1 instructions. This patch un-swaps those pairs of instructions again, both for execution, and for disassembly. (The previous version of the patch always read four bytes in arm_read_memory_func and then extracted the proper two bytes, in a probably misguided attempt to match the behaviour of actual hardware as described by e.g. the ARM9TDMI TRM, section 3.3 "Endian effects for instruction fetches". It's less complicated to just read the correct two bytes though.) Backports commit f7478a92dd9ee2276bfaa5b7317140d3f9d6a53b from qemu
57 lines
1.7 KiB
C
57 lines
1.7 KiB
C
/*
|
|
* ARM load/store instructions for code (armeb-user support)
|
|
*
|
|
* Copyright (c) 2012 CodeSourcery, LLC
|
|
*
|
|
* This library is free software; you can redistribute it and/or
|
|
* modify it under the terms of the GNU Lesser General Public
|
|
* License as published by the Free Software Foundation; either
|
|
* version 2 of the License, or (at your option) any later version.
|
|
*
|
|
* This library is distributed in the hope that it will be useful,
|
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
|
* Lesser General Public License for more details.
|
|
*
|
|
* You should have received a copy of the GNU Lesser General Public
|
|
* License along with this library; if not, see <http://www.gnu.org/licenses/>.
|
|
*/
|
|
|
|
#ifndef ARM_LDST_H
|
|
#define ARM_LDST_H
|
|
|
|
#include "exec/exec-all.h"
|
|
#include "exec/cpu_ldst.h"
|
|
#include "qemu/bswap.h"
|
|
|
|
/* Load an instruction and return it in the standard little-endian order */
|
|
static inline uint32_t arm_ldl_code(CPUARMState *env, target_ulong addr,
|
|
bool sctlr_b)
|
|
{
|
|
uint32_t insn = cpu_ldl_code(env, addr);
|
|
if (bswap_code(sctlr_b)) {
|
|
return bswap32(insn);
|
|
}
|
|
return insn;
|
|
}
|
|
|
|
/* Ditto, for a halfword (Thumb) instruction */
|
|
static inline uint16_t arm_lduw_code(CPUARMState *env, target_ulong addr,
|
|
bool sctlr_b)
|
|
{
|
|
uint16_t insn;
|
|
#ifndef CONFIG_USER_ONLY
|
|
/* In big-endian (BE32) mode, adjacent Thumb instructions have been swapped
|
|
within each word. Undo that now. */
|
|
if (sctlr_b) {
|
|
addr ^= 2;
|
|
}
|
|
#endif
|
|
insn = cpu_lduw_code(env, addr);
|
|
if (bswap_code(sctlr_b)) {
|
|
return bswap16(insn);
|
|
}
|
|
return insn;
|
|
}
|
|
|
|
#endif
|